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We are looking at starting PCB design in house, up until now we have outsource design and manufacture. This means that we have yet to see the real cost of the PCB, components and assembly as discrete items.

Looking at the current PCBs that we have, they currently all use SOIC style of chips, even when QFN parts are available alternatives. Is the reason for this because the legs on SOICs make them easier to use in manufacture? Or is it because the legs on SOICs make life easier for debugging and hand soldering etc?

We are interested in the cost of assembly in large, 100k or 1000k quantities, when produced in a production line with pick and place machines.

I haven't found any difference in the cost of the IC in the different packages, so I don't think that is the reason. But it could be that the difference packages are delivered in different methods; tape and reel vs a tray.

Is there any resource that I can use for estimating which is the cheaper packages or delivery packaging? I've tried a bit of internet searching, and not found anything yet.

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    \$\begingroup\$ For those sorts of quantities, get in touch with a few contract manufacturers and have a chat. They'll probably buy you lunch for that much work. A lot of it depends on the capabilities they have (quality of machines, inspection and rework equipment) as to the costs. If they are a decent place they will assign you a manufacturing engineer who can advise you on what sort of rework rates you can expect for different packages etc and advise on other design for manufacture aspects of your product. If you already have a board you'll get a ton of information from showing that to them. \$\endgroup\$ – Jon Apr 25 '17 at 15:17
  • \$\begingroup\$ You might be able to get away with a slightly crappier assembly house with SOIC. The PCB area will likely be different but that's difficult to estimate- fanout is highly dependent on design rules and layers- you can't usefully just compare raw package area usually. There are many other factors that enter into a production design- you would benefit from working closely with the assembly house. Consider your first design as kind of a breadboard and be prepared to hone it a bit here and there. If the assembly house is offshore there can be significant advantages to using parts that are local. \$\endgroup\$ – Spehro Pefhany Apr 25 '17 at 15:25
  • \$\begingroup\$ Between SOIC and other leaded packages, I wouldn't expect much if any price difference. In my experience, though, once you go to flip-chip BGA or similar packages, the cost goes up. I have seen this with NAND flash and SDRAM. The BGA parts were quite a bit more expensive than leaded parts. \$\endgroup\$ – mkeith Apr 26 '17 at 4:09
  • \$\begingroup\$ QFN is also more sensitive to board finish quality, I believe (i.e. ENIG vs HASL). \$\endgroup\$ – DKNguyen 18 hours ago
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Cost is most likely not going to be any different between a DFN/QFN or SOIC. The main reason to generally have SOICs instead of QFNs is to facilitate debugging, hand soldering, number of layers on your PCB board, and more.

Debugging is much easier with SOICs since you have direct access to the pin and you do not need to remove the solder mask. With a QFN, you would generally expect your PCB boards to be fully functioning and mass produced. To debug a board with QFNs, you would generally need to remove the solder mask to rpobe the specific copper trace.

Hand Soldering is done when you have only a few PCB to do and it is much more cost effective than buying a reflow oven for mass production.

PCB Area comes in handy when you have a lot of parts to dispatch through the board and area is limited. A QFN chip is smaller in size and will usually require less area. In the other hand, you will most likely need more layers for traces, which will also require more vias and so on. This is a trade-off that you have to factor in.

PCB Layers is important as I mentioned above. If you have a lot of layers and can afford to route the traces that way, a QFN could be very useful. But for the typical smaller projects which have 2-4 layers, a QFN part is generally not used. Or atleast, a big IC 4x4 and more.

With all that being said, it is critical to follow Design Rule Check (DRC) to make sure your traces on a QFN meet the requirements.

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  • \$\begingroup\$ Sounds like you're agreeing with my hunch: the benefits are for debugging rather than cost. \$\endgroup\$ – Puffafish Apr 25 '17 at 16:10
  • \$\begingroup\$ But if you have QFNs you can always lay things out so the board has test points for access to the QFN pins. \$\endgroup\$ – DKNguyen 18 hours ago
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Personally, I'm not having any experience, but looking into same question. I tend to disagree with previous answer, as doing online quote on Chinese 7pcb, shows that 1k boards with SOIC is nearly 40% cheaper than with QFN for the same number of pads.

USD 1.3k vs 2.2k

Speaking to customer service confirms this, as they say that for QFN they have to use XRay machines to verify soldering quality, which is obviously not needed for SOIC, where visual inspection is sufficient.

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  • \$\begingroup\$ At quantities of a million though, you might save cost on PCB space with the QFN compared to SOIC (but the cost of PCB space might not also matter with such high board quantities). \$\endgroup\$ – DKNguyen 18 hours ago

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