# Best way to filter DC-DC output noise

This question has rised due to the below issue, where a analog design board was scraped due to too much noise from switching regulators

eliminating-those-unwanted-op-amptia-outputs

the design which caused issue is as below

my complete power budget is like below

Input : 12V
Ouput
5          1040
-5          544
2.5         800
-2.5         800
3.3         16


this kind of power supply distribution and design can be done with a bunch of switching regulators, but my question how to completely eliminate the switching noise of dcdc switching regulators

in my previous design i tried using output filter caps of 0.1F, 0.01uF, 47uF, 4.7uF as suggested, but it did not help me to that extent

i am thinking of putting an LDO at the output of DCDC to reduce the noise is that proper solution ? or should i have to think of a pi filter ?, but they can create EMI issues to me(really not an expert in EMI avoidance. my senior suggested me to go for a inductor less modules which help in avoiding EMI issues)

as my application is an electro optic one, which involves in analog opamps i stick to have a output ripple voltage not more than few mV, so that it will not be difficult for me pick signals of low amplitudes around 30mV

i agree to moderators suggesting to take care in PCB design, but primarily i want to take care schematic wise as much as possible and then want to take care in PCB design

Kindly suggest me techniques/ tutorial to tackle noise in very low noise floor analog circuits, stressing on noise filters to be adopted at output of dcdc's, or should i have to scrap the idea of using a dcdc itself and go for using LDOs.

EDIT 1 : Addition of a CLC filter at dcdc output

with some suggestions of pi filters i have tried to create a CLC filter using components at my desk

L = 10uH and C being 4.7uF, 47uF, 0.1uF and 0.01uF(all 0603 SMD)

i did not get a 1nF but i was able to see noise suppressed to an extent, this set up is bare soldered and checked whether filter output is proper or not, i did not solder this on actual board, instead i took +/-5V from board and checked the filter output

With Out CLC Filter

With Filter

or an output LDO will reduce it much further ?

• "my question how to completely eliminate the switching noise of dcdc switching regulators" - It's important to realize you can never completely eliminate it. You'll always have noise, even if you use linear regulators, or even batteries (which are actually noisier than specialty low-noise regulators). So the first step is to let go of the notion you can eliminate all noise. The second step is to quantify what noise is acceptable so you have a concrete design target. – marcelm Apr 27 '17 at 9:23
• Not only is there output voltage noise, there's input reflected ripple currents, there's rail and ground conducted output noise current, caused largely by distributed capacitance. Creating a low-noise board with switching signals is almost a black art with loads of maths and also board layout consequences. No time to go through some of it in an answer, but rest assured it can be more complicated than just a filter in your schematic. – Asmyldof Apr 27 '17 at 9:26
• It always matters where you route the filter caps, and that doesn't show up on a schematic. Identify the switches and hence the alternate current paths through the switcher, then minimise the area of the loop of current that has to be changed when the switch occurs. You do this by carefully selecting where you connect each high frequency capacitor to lines and ground. – Neil_UK Apr 27 '17 at 9:26
• will isolated ground dcdc would solve my problem ?? – kakeh Apr 27 '17 at 10:15
• results updated – kakeh Apr 28 '17 at 6:09

Generally speaking, high-frequency noise will go straight through a linear regulator. There's a temptation to think of them slicing off everything above a certain voltage but they don't operate like that.

Inductors can be used to block the propagation of noise waveforms but the resultant load-side rail needs to be very well decoupled. This is because a transient demand for current by the load will be blocked instantaneously by the inductor (to view it simply) so the capacitance must supply this transient current in the very short term. I put a good amount of bulk and high-frequency capacitors across the load rail to effect this.

I can't say this is the definitive solution but this approach has worked very well for me on many boards.

I had to produce quiet analogue supply rails from a DC-DC converter output. I did so by putting a pi filter (C-L-C) between my +15/-15 V DC-DC and +12/-12 linear regulator and then another pi filter on the output of the linears leading to the analogue signal conditioning load circuitry and a generous number of 10 uF and 100 nF capacitors distributed well across the board, close to each load.

In my pi filters, the C was an assortment of parallel capacitor values (1 nF, 100 nF, 47 uF). But this also ensured enough capacitor sites on the board for me to experiment with other values during operational testing and EMC testing. The L was 10 uH. I also had 100 MHz bead ferrites between the DC-DC output and the first pi filter. (I prefer not to paste/redraw the circuit for confidentiality reasons but this describes it well enough.)

Again, I can't say this is the definitive solution but this worked very well for me on this board.

• you can't beat an FGC (very large capacitor) ;-) – Neil_UK Apr 27 '17 at 9:22
• :-D @Neil_UK Aren't they next to McDonalds in the high street? – TonyM Apr 27 '17 at 9:27
• can you please provide me reference of these CLC base design – kakeh Apr 27 '17 at 10:42
• @kakeh, see edited answer inc. why no schematic. – TonyM Apr 27 '17 at 11:06
• @kakeh here's an example of calculating the Pi filter in an app note from Maxim maximintegrated.com/en/app-notes/index.mvp/id/4713 – Volodymyr Smotesko Apr 27 '17 at 12:45