1.regarding to logic gate concept i have to design the circuit with 4 bits multiple of 3 detector. but when i trying to make logic gate and truth table it seems to me it's wrong so i have no idea how can i do design circuit with 4 bits multiple 3 detector with truth table and circuit shape. 2.what actually detector do in logic gates and what is the affection of that on truth table?
You first have to write down the truth table, get the logic function f(x1,x2,x3,x4) and minimize (if possible, but I think in this case is not) it with the Karnaugh Maps method. Then you can draw down the circuit using some AND ports (with 4 inputs) and a OR port (with 6 inputs if the f() is not minizable). Let's try.
Edit: I say 6 inputs because you have 6 multiples of 3 in 0-15 range