# Class AB amplifier Design

I want to design a Class AB amplifier as seen below. But, I don't know how to find the values of the resistors and capacitors. I have found the KVL around the closed loop containing the diodes and resistors to find R; where R = (Vcc - 1.4V)/(2*I) but I dont know how to determinet I. Is there any way to find I, also my load resistor is 4 ohms. Thanks

• bypassing the diodes with capacitors can improve the tolerance on the biassing current. Note that this schematic is more of a sketch for discussion, than a design for a high fidelity audio amplifier. Apr 28 '17 at 7:30
• I should be significantly larger than the base currents of TR1 and TR2 -like 5-10x larger. Apr 28 '17 at 8:50
• As the transistors heat up, a positive feedback event will occur; the transistors will thermally run away, and destroy themselves unless enough lumpd Re is in the emitters. Play it safe, and insert 1_Ohm in each emitter. Or 10_Ohms for small transistors. Apr 28 '17 at 11:25

For basing diodes, 1-5mA range is quite acceptable.

But does not finish with this. You need some other info:

As you might know, output current passes through collectors. So each output transistor's base will need a current of $I_B = I_C / \beta$. Thus, R1 and R2 should also allow enough base current for output transistors.

• Determine output power ($P_O$) and calculate output voltage ($V_O$) and current ($I_{O}$). Also, this circuit has a unity voltage gain:

$$V_{O-rms} = \sqrt{P_O \cdot 4\Omega} \ ,\ \ \ \ V_{O-pk} = V_{o-rms} \cdot 1.41$$ $$I_{O-rms} = \sqrt{P_O / 4\Omega} \ ,\ \ \ \ I_{O-pk} = I_{o-rms} \cdot 1.41$$

Select proper transistors having enough $V_{CE}$ for $V_{O-pk}$ and $I_C$ for $I_{O-pk}$. Select Vcc for enough voltage swing: $V_{CC} = 2\cdot V_{o-pk} + 1V$

• From datasheets, calculate required base currents from $I_B = I_C / \beta$. Note that $\beta$ value can be quite low (e.g. between 10 and 25) for high output currents.
• Calulate R1 and R4 for diode bias current and transistor base current.

Input coupling cap is calculated from minimum input frequency ($f_L$). If we assume input impedance is parallel equivalent of R1 and R2 (say $R_i = R1 || R2$) then input coupling cap is $Ci = 1/(2\pi f_L R_i)$. If you don't have any info, put a 10uF electrolytic and test.

Output coupling cap is also calculated from minimum input frequency: $C_o = 1/(2\pi f_L \cdot 4\Omega)$. If you don't have any info, put a 2200uF electrolytic (+ to common emitter, - to load resistance) and test.

• Thanks for the reply. Where did you get 1-5mA range as I would need to refer to it. Apr 30 '17 at 2:52
• @Swag96 Any small-signal general purpose or fast switching silicon diodes serve good performance at that level of bias currents. For example, I recommend you to use 1N4148 (or LL4148 which is the SMD version) diodes because they have good performance at high temperatures and you can see from the datasheet that 1-10mA range is quite linear, so you can select any bias point on that range (e.g. for If = 3mA, Vf = 0.7V). Apr 30 '17 at 5:57