0
\$\begingroup\$

I'm currently playing around with discrete transistor logic gates and now want to create a tri-state buffer.

The only circuit that I found that kind-of works is this one, but it inverts my input:

inverting tristate buffer

Putting an inverter in front of it, will cause the T2 to be open, and therefore connect the output to the ground, which is not really what I want for a tristate buffer.

Putting an inverter behind the gate will cause the output to be connected to ground via the inverter-gate. Also not what I want.

Is there a non-inverting tristate circuit which I can build with NPN/PNP BJT transistors only?

\$\endgroup\$
  • \$\begingroup\$ well... you could always just use two of those inverters. \$\endgroup\$ – Hearth Apr 29 '17 at 23:40
  • \$\begingroup\$ Or could just run the inverter output to pin 2 and the data input to pin 6. \$\endgroup\$ – WhatRoughBeast Apr 29 '17 at 23:42
  • \$\begingroup\$ @Felthry what would be the purpose of that? \$\endgroup\$ – SkaveRat Apr 29 '17 at 23:50
  • \$\begingroup\$ @WhatRoughBeast I'm not sure I understand. Can you draw me a circuit? \$\endgroup\$ – SkaveRat Apr 29 '17 at 23:52
  • 1
    \$\begingroup\$ Use two inverting buffers. That makes one non-inverting buffer, with twice the propagation delay. \$\endgroup\$ – Hearth Apr 29 '17 at 23:53
1
\$\begingroup\$

Your linked circuit shows what is essentially a 74125 buffer on the left side. TI's SN74125/126 datasheet shows how the TTL tri-state buffers are implemented (the only difference between '125 and '126 is the polarity of the tri-state input):

SN74125/SN75126 schematic

(TTL chips used only NPN transistors, so the output cannot go up VCC.)

\$\endgroup\$
  • \$\begingroup\$ so if I understand correctly, there is no simpler circuit with BJT transistors only? \$\endgroup\$ – SkaveRat May 8 '17 at 14:07
  • \$\begingroup\$ In the Good Old Times™, logic chips were made only with NPN transistors. I guess PNPs would make it easer. (An open-collector buffer would be trivial.) \$\endgroup\$ – CL. May 8 '17 at 14:43
  • \$\begingroup\$ PNP wouldn't be a problem. But as I want to create a bigger logic circuit, having several tristate buffers made from a dozend transistors each, would be quite a pain. That's why I'm looking for a simple NPN/PNP BJT cuircuit. Now looking into open collector stuff, to check if I can use that instead \$\endgroup\$ – SkaveRat May 8 '17 at 15:46
-1
\$\begingroup\$

Per SkaveRat's request,

schematic

simulate this circuit – Schematic created using CircuitLab

\$\endgroup\$
  • \$\begingroup\$ When the first input is low, then both transistors are on. 🔥 \$\endgroup\$ – CL. Apr 30 '17 at 9:13
  • \$\begingroup\$ You would have to implement Q1 = A ∧ G̅, Q2 = A̅ ∧ G̅. \$\endgroup\$ – CL. Apr 30 '17 at 9:24

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.