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Reading through my textbook, I found the circuit of DRAM, and I can't get one part of it. It looks like that in one cell configuration as well.

My question is: what does two input and one output buffer produce? I know that buffer passes the data it got from one end and outputs to the other end without modifications. Am I correct that this is indeed a buffer and not some other gate of the circuit?

P.S. there are some other gates before the read/notwrite, but I decided to omit them, since they don't seem to be relevant.

schematic

simulate this circuit – Schematic created using CircuitLab

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  • \$\begingroup\$ That's a transmission gate: the read/write# controls whether or not the output is driven. In read, the output is "off" and no current flows through the buffer. \$\endgroup\$ – MarkU May 5 '17 at 20:15
  • \$\begingroup\$ @MarkU, so its something like a D latch? The behavior seems to match perfectly. Also, is my question off topic or wrong in any way? If its wrong I can just delete it, but if not, I would want to accept the answer if you post it. \$\endgroup\$ – Incomputable May 5 '17 at 20:16
  • \$\begingroup\$ Look up 74HCT125, you can get 4 of them in one IC package \$\endgroup\$ – vicatcu May 5 '17 at 22:20
  • \$\begingroup\$ Actually 74HC126 is more like it \$\endgroup\$ – vicatcu May 5 '17 at 22:27
  • \$\begingroup\$ @vicatcu, it is sequential output gate, if I recall correctly. It shifts one bit after the other from input to output, and also has some latch features. Yeah, it looks like that, just 4 bit. \$\endgroup\$ – Incomputable May 5 '17 at 23:23
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This is a tri-state buffer. When the control signal (Read/NotWrite) is high, the data signal is propagated from "Data In" to whatever is connected to the right. When it is low, there is a virtual disconnect between "Data In" and the output of the buffer. In case of DRAM it might be used to select a function of the data pin to be either input or output.

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That is a tri-state buffer. The Read/notWrite input turns the output of the buffer off or on. These are normally used to between the data output of a memory, and a databus.

If the Read/notWrite control line is High, the buffer works normally to pass data. With the control line Low, the output stage is off, effectively disconnecting the memory from the databus.

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