# LOW and HIGH definition for Enable pin of 4051?

Suppose we have connected an X volt (X=10) as the supply of a 4051 MUX (which is active LOW), can we disable the device by applying a B volte (assume B is 5 volt). In other words, how high is HIGH relative to the supply voltage?

• Read the data sheet - it will tell you the digital logic levels for 1 and 0. Commented May 6, 2017 at 15:07
• thanks Andy, I've did already, but I couldn't find anything on that. I'll take a look again now. Commented May 6, 2017 at 15:08
• Just look at the datasheet. Any good one will have logic levels on it. Commented May 6, 2017 at 15:08
• For 4000-series CMOS logic, the standard is: logic low is 0..30% Vdd; logic high is 70..100% Vdd. Stay out of 30..70% Vdd, the chip's entitled to logically misbehave. (There are applications that do things in this range to get 'linear mode' from the IC but put that aside for pure logic circuits.) Take nothing for granted, always check the data sheet. Commented May 6, 2017 at 15:22
• The 4051 has internal level shifting- the guaranteed logic level 1 is 0.7*(Vdd - Vss) relative to Vss, and Vee does not affect it, at least for Vee <= Vss. Commented May 7, 2017 at 13:36

## 1 Answer

Well here it is (at least for the CD4051/52): -

This is from the first 4051 data sheet found. On a 10 volt supply the high level must be at least 7 volts. It's a 70%:30% thing.

• exactly, you got it! Commented May 6, 2017 at 15:15