I'm trying to drive IRLZ44N mosfets with a 74HCT241N buffer IC (as this is what i currently have laying around). Current setup is trying to switch 2 mosfets which pass a 48V potential.

No previous experience with mosfets i'm afraid, first 74HCT241N connected directly to the gate of the mosfet went up in smoke.

Is there a way to make this work? (ie. with a set of gate resistors) and would i need pull-down resistors on the gate?

Update; added test circuit enter image description here

  • 4
    Schematic please... – Trevor_G May 6 '17 at 17:43
  • 2
    Seconding Trevor's comment. There's three or four common ways to mess this up; without a schematic, we don't know which one you've done (or if you've come up with something new). – The Photon May 6 '17 at 17:47
  • added the test circuit schematic – Mervin May 6 '17 at 18:35
up vote 3 down vote accepted

The problem is that your load is in the source-GND path, rather than the 48V-drain path. When your FET switches on, its source will rise to pretty-much 48 V and your 74HCT241N can only output 5-odd V, not the 48V+Vgs(on) necessary to keep it on.

You'd be looking to make something like this.

schematic

simulate this circuit – Schematic created using CircuitLab

Make sure that your 74HCT241N power supply has decoupling capacitors close to the IC so it can deliver current into the FET gate capacitance on switching, without making its 5 V supply dip. Something like 100 nF and 10 uF in parallel and close to its pins should be plenty.

On switching high, the gate capacitance will present your IC output with an instantaneous short circuit. This can damage the IC output so R1 limits this current to 5 mA and then less as the gate charges. R2 ensures that the capacitance dies away quickly when the circuit is powered off. The output clamp diodes in the IC will pull the output down as the supply fails but only if the 5 V rail has lower impedances across it. Not knowing, R2's here.

Assuming you have it configured in the usual manner, this is what you are working with.

schematic

simulate this circuit – Schematic created using CircuitLab

Note a MOSFET is a capacitive input.

When turning it on. You need to charge C2. When it charges high enough the drain is going to drop to near zero, forcing the bottom end of C1 down to ~\$-48\$V, and the logic gate needs to drive more current to dump that charge.

Similarly, when you turn off the device, the logic gate needs to discharge C2 till the MOSFET turns off. That will drive the bottom end of C1 UP to \$48V\$. The logic gate then needs to pull current to allow C1 to charge.

Your logic gate gate has a maximum current it can push \$I_{OH}\$ or pull \$I_{OL}\$. You therefore need a series resistor to ensure that the current drawn does not exceed that value under the above conditions or else the resulting current or voltage at the pin will fry the gate.

As for a pull down. As long as the logic gate is not a driver than can go high impedance, this should not be necessary.

UPDATE AFTER YOU ADDED THE SCHEMATIC.

You can not use an n-channel MOSFET on the high side like that using simple logic drive. The controlling voltage is gate to source. With the load beneath the gate it will immediately turn itself off again as soon as current flows through the load. Then it will either oscillate probably frying the MOSFET. Further, you just added a much more complicated capacitor effects that will put a sustained load on the logic gate.

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