Step down voltage regulator uncertainties

Question

The step down voltage regulator I'm currently looking at is the 5V, 5A Step-Down Voltage Regulator D24V50F5 from Pololo ( https://www.pololu.com/product/2851 )

In the description it mentions an EN (standing for enable) pin that can be used to power down or power up the regulator. This sounds like a neat functing I can certainly find use for, however, I'm not sure on the explanation on using it:

The regulator is enabled by default: a 100 kΩ pull-up resistor on the board connects the ENABLE pin to reverse-protected VIN. The ENABLE pin can be driven low (under 0.6 V) to put the board into a low-power state. The quiescent current draw in this sleep mode is dominated by the current in the pull-up resistor from ENABLE to VIN and by the reverse-voltage protection circuit, which will draw between 10 µA and 20 µA per volt on VIN when ENABLE is held low.

If I understand this correctly, if i connect the EN pin with GND it will disable to regulator and thus cut the VOUT?

Thanks for your suggestions!

Answer 1

I think you understand it well. They are basically telling you that without an added connection (made by you, somehow), their power supply will be ON by default. They then add that if you add a connection to over-ride their default behavior, which they anticipate you may want to do, then you need to be aware of the fact that to over-ride it you have to "sink" (or pull-down) enough current to achieve it.

It's a very modest amount of current. But since they don't entirely know exactly what \$V_{IN}\$ you will be providing, they instead tell you that they have a \$100\:\textrm{k}\Omega\$ resistor there and also that there may be some added current you have to sink (beyond that resistor's requirements) for their added protection circuitry. The upshot of this is that you should be prepared to sink at least \$20\:\mu\textrm{A}\$ per volt and that you should consider the input to look like this:

^{simulate this circuit – Schematic created using CircuitLab}

(Here, you can easily compute \$R_1=\frac{1\:\textrm{V}}{20\:\mu\textrm{A}}=50\:\textrm{k}\Omega\$.)

If you want to disable the module, you need to make sure that the ENABLE line is pulled below \$600\:\textrm{mV}\$. Just grounding it works fine (of course.) That pretty much guarantees it. But they know that no one is really just going to ground that input. That would be pointless. So they also want to make sure you understand the details enough that you can make sure that whatever you use will be able to "pull down" enough.

Suppose you didn't just ground it but instead hooked up a \$10\:\textrm{k}\Omega\$ resistor from ENABLE to ground. And suppose \$V_{IN}=35\:\textrm{V}\$. Then it's pretty clear that the voltage would be perhaps as high as \$35\:\textrm{V}\cdot\frac{10\:\textrm{k}\Omega}{10\:\textrm{k}\Omega+50\:\textrm{k}\Omega}\approx 5.8\:\textrm{V}\$, which obviously won't work. In this case, you'd need to use a resistor of less than \$872\:\Omega\$, which will sink near \$690\:\mu\textrm{A}\$, to meet the specifications.

This is what they are trying to get across to you. You might need to sink almost a milliamp in some cases and they want you to be aware of it. They also want you to know enough so that if you do want to control it, you can successfully design a reasoned circuit arrangement.

Answer 2

You're right, but "cut" isn't the term I'd use - the output is still connected, it's just that no voltage will be output on it. It won't be isolated from your load as if a switch were opened.

Answer 3

TTL medium scale logic always used active low input to control something, like Register load, Master reset, because it didn't matter if one used an open collector switch or totem pole or now CMOS.

You don't even need a power source to disable the output. Just a switch to ground, NPN or any logic Vol that can go below 0.6V with 100K pull-up, which includes all CMOS and TTL.

This is the most common method to control outputs in supplies for either powerup sequencing or going to sleep mode with a small Aux supply left on. for sleep or wake-up functions.

PC's however use a low logic level from the front panel to power up the ATX supply main outputs.