I've got a 4-layer prototype transmitter board built that is using a low-speed MCU (2 MHz). The critical RF sections are 50 ohm impedance matched to the board's characteristics. I eliminated the GND plane under the antenna and did some via shielding.
The board is just a traditional 4 layer stackup. Top Layer | GND | VDD | Bottom Layer. So in the first run of the board, signals are traced on the outer layers, and then I used vias to connect to the GND & VDD layers. I did not use any copper pours on any outer layer.
Overall the signal strength of my prototype board vs. the manufacturer demo module is largely the same.
However, the TX board is going to go into an enclosure so any increase in transmission strength from board layout is going to be a benefit.
I've got to do another turn of the board for some layout corrections, and I can't decide if it is worth flooding the outer layers with copper pours.
On one hand, you have the potential EMI reduction benefits. I've had the board FCC tested at a qualified lab for Part 15, but not for any applicable EMI type testing yet. I'm assuming I am compliant... if not, okay sure copper pours. But that is not my main concern.
At 433 MHz, antenna manufacturers (Linx Technologies) specify 6 inches by 6 inches for an "ideal" GND plane for a 1/4 wavelength antenna. Clearly, I don't have that kind of space on my board.
As this is a cheap consumer product, we are using low cost metal helical antennas. If you examine one of these antennas with a VNA, they do not have great center frequency responses (+/- a few MHZ) and have pretty poor SWR across 433mhz. The upside -- they are cheap and compact. Any increased antenna performance, I could eek out with a board change is basically just low hanging fruit.
Do you "get" a larger GND plane by flooding the outer layer with a GND plane and then tying it with vias back to the GND plane? Would you get some benefit there for better antenna performance with a larger GND plane?
On the other hand, I've read that a copper pour on the outer layers can influence trace impedance? The TX IC I am using, comes with a matching network to turn the TX output signal to 50ohms. If you adjusted the trace impedance with the copper pour, the IC manufacturer does not provide details on their TX IC & matching network where you could easily readjust their matching network. So that seems like a potential source of signal attenuation.
Also on the negative side, I've read there is a potential for creating antennas for stray pieces of the GND plane that aren't tied through vias. Assuming you know what you are doing, you can control for this and tie all the copper back to the internal GND plane with vias?
I read one ATMEL app note, and they noted copper pours on 4-layer RF boards as questionable practice for anything but EMI purposes. In their example they put a copper pour on the top layer with all the RF comoponents and traces, and then just loaded up the board with via stiching (30mil pattern) wherever the copper pour was present.
Is there anyone here who has built a 4 layer RF board, who has ever seen a performance boost by implementing GND pours on both outer layers?
Most application notes typically infer a user is using a 2 layer board, where the benefits are more clear. I've seen this debated each way, and am wondering if someone can speak from experience with a RF 4-layer board?