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I am implementing a DDR3 interface on a PCB and I have a question regarding the termination of address/control/command/clk traces.

I have series terminations for all the required traces mentioned above, my question is whether or not the traces going to these terminations require length matching or should they just be kept as short as possible and left as uneven termination stubs? To me it makes sense to keep them as short as possible even if lengths aren't matched well, but I wanted some other opinions on the matter :)

Thanks!

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  • \$\begingroup\$ depends on track Zo, length and thus propagation delay compared with rise time. if delay is roughly < 16x rise time, then ringing is attenuated, ok, otherwise if delay > 16x rise time then ringing and poor impedance controlled tracks may result in ringing and false values. \$\endgroup\$ Commented May 11, 2017 at 0:13
  • \$\begingroup\$ How many DDR3 chips present? You can refer the JEDEC DIMM specifications for all Trace lengths as a reference. \$\endgroup\$
    – user19579
    Commented May 11, 2017 at 7:21
  • \$\begingroup\$ Please specify which chips are involved \$\endgroup\$
    – Voltage Spike
    Commented Nov 19, 2023 at 6:19

4 Answers 4

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In an ideal world where the trace impedance, load impedance, and termination impedance are all ideal and perfectly matched, it doesn't make any difference how long the termination stubs are, or whether they're length-matched, because a terminated TL of any length is equivalent to a pure resistance, absorbing all of the signal presented to it and generating no reflections.

In the real world where there are parasitics and all matching is imperfect, it makes sense to keep the termination stubs short to minimize EMI and to keep the delay of any reflections as short as possible. There doesn't seem to be any compelling reason to length-match them. It's the paths between sources and loads where you need to avoid skew.

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I was still unable to find a solid written answer in the JEDEC specification or in design guides but after looking through some reference designs I found that termination resistors are always placed as close as possible to the final signal pin (last ram chip).

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  • \$\begingroup\$ AFAIK length matching is needed to meet timing. \$\endgroup\$
    – EE_socal
    Commented Jul 25, 2018 at 23:16
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In short, you don't need length matching for termination resistor traces but you should keep this length minimum, maximum of 300mils is recommended. You can find same recommendation in Micron reference design (I don't recall what exact UG it was, sorry)

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Length matching is needed, you don't want the data or control to switch after the clock. Here is an example of how this is to be done.

enter image description here Source: https://fedevel.com/blog/ddr3-length-matching-rules

Termination stubs don't matter as long as you keep them to something like 1/20th of the wavelength, if you get into longer then that, you need to run an analysis.

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  • \$\begingroup\$ I don't think you read the question closely enough. \$\endgroup\$
    – hobbs
    Commented Nov 19, 2023 at 7:02

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