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I'm looking into the construction of logic gates, and am wondering what conditions are need across emitter-base-collector in terms of both voltage and current to enter the saturation mode. For reference, I'm interested in npn type Bipolar Junction Transistors. Any help, and links, that you can give would be most appreciated, as I cannot find a unified answer to this.

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    \$\begingroup\$ 1. Perhaps better on the EE stack. 2. Look on the transistor data sheet. 3. Logic is nearly all CMOS, not bipolars these days. \$\endgroup\$ – Jon Custer May 12 '17 at 12:33
  • \$\begingroup\$ Thank you for the comments. I realise that most systems are CMOS, but part of my task was to look at the development of the system. \$\endgroup\$ – Benedict Bunting May 12 '17 at 14:02
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The easiest way to drive a transistor into saturation is to ensure you are providing copious amounts of base current, say \$I_C/10\$.

You can also schottky clamp the base-collector terminal so that you only drive the transistor into being on the edge of saturation, and thus having a faster turn-off time.

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The B-E junction and B-C junction must both be forward biased in order for a BJT to be in saturation mode. That is Vb > Ve & Vb > Vc. In this mode, the transistor is a logical "on", or a closed switch.

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