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I was working on the half Bridge and I introduces a dead time between two complementary signals to avoid shoot through.

I get a very strange output when both of the switches are off (in the death zone).

Since both the switches are off so the oscilloscope probe is connected to nothing and it's in floating state. So I should ideally get a zero output in this time(dead). But I get overshoots or ripples in the output waves (red). Why is this happening? I think its something to do with the parasitic capacitance of MOSFETs.

Blue: Gate Control Signal to upper side optocoupler. RED: Bridge output with respect to ground. enter image description here

Circut Diagram Mosfets supply is 4.5V instead of 12. And lower Mosfet source is connected to ground. And Load is not connected. enter image description here

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  • \$\begingroup\$ thats not a H-Bridge & by any chance is your load inductive \$\endgroup\$
    – user16222
    May 13, 2017 at 19:49
  • \$\begingroup\$ No load is connected. \$\endgroup\$
    – Masood Salik
    May 13, 2017 at 19:51
  • \$\begingroup\$ @JonRB H-Bridge and Half-Bridge are totally different things. This is half-bridge. Anyway, as for the OP's question, seems like he forgot to place the diodes across each MOSFET which are essential for HB switches. One more thing: Supplies for optocouplers and MOSFETs should be isolated. I see the same ground symbol for both. \$\endgroup\$
    – Rohat Kılıç
    May 13, 2017 at 20:15
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    \$\begingroup\$ well I would call it a leg because that is what it is. And he hasn't forgotten to place the diodes... the intrinsic diode is present but as there is no load at the moment that is moot. \$\endgroup\$
    – user16222
    May 13, 2017 at 20:15
  • \$\begingroup\$ Addition to my comment (after JobRB's edit): Load placement is not correct. Where are the bridge (divider) capacitors? One end of the load should be connected to the common point of bridge capacitors instead of ground. Google "Half bridge converter" and see the basic configuration. \$\endgroup\$
    – Rohat Kılıç
    May 13, 2017 at 20:23

1 Answer 1

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"it's in floating state. So I should ideally get a zero output"

It's 'floating', so it will 'float' to a voltage determined by any parasitic elements in the circuit. MOSFET capacitance is one contributor, but other things could also have an effect (eg. Drain-Source leakage, bias supply V3).

Your oscilloscope probe presents a very high impedance - 10MΩ in parallel with ~10pF on x10 setting - so it acts as a very weak pull-down and currents in the nA range will have a plainly visible effect. The IRF540 has D-S leakage of up to 25uA at 100V.

If both FETs are turned off long enough to equalize parasitic capacitances the output will float to a voltage determined by the relative D-S leakages in each FET (one pulling up, the other down).

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  • \$\begingroup\$ So I could explain it like this? When the upper switch is on the Cds of the lower switch get charged due to are Drain Source leakage current.When the output is takenduring dead time its remain in the high state. When the lower switch is on the the upper switch Cds get charged. \$\endgroup\$
    – Masood Salik
    May 20, 2017 at 12:44
  • \$\begingroup\$ Another question that arises is: How the floating state at rising end and falling end different? \$\endgroup\$
    – Masood Salik
    May 22, 2017 at 22:06

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