# How do you Calibrate 32.768kHz crystal for PIC24 RTCC

I'm trying to figure out the best method for PIC24 RTCC crystal calibration. Their application note states two methods: using a lookup table and using a reference system clock.

According to them the reference system clock method is best, but they recommend a system oscillator that is a multiple of the RTCC crystal oscillator, like 16.777MHz.

Has anyone actually tried this RTCC crystal calibraiton process for PIC24? I would appreciate some practical guidelines. I'm using PIC24FJ128GA006.

• This is pain. The easiest way is to find a SPI RTC clock device. – Standard Sandun Apr 23 '12 at 15:52
• @sandundhammika i was thinking having to read hours,mins,secs from an SPI device everytime i need to display the time would also be a pain. the system being designed has a lot going on, even an SPI LCD driver as well, not to mention the need to reduce component count and overall system cost. – TiOLUWA Apr 23 '12 at 16:12
• @sandundhammika This won't help at all. An external RTC will have to be calibrated exactly the same as the internal one would (unless it comes pre-trimmed with a crystal, but this type of unit is generally a very expensive option for a production design) – Nathan Wiebe May 6 '12 at 23:26

Calibrating against the mains frequency, as Tony suggests, is a bad idea. Long-time accuracy may be good, short-time accuracy isn't.

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Tony is dismissive about my reference, but that's no problem, there are other sources which confirm this. (Note that he does use my reference to show an absolute accuracy of 10 mHz/50 Hz = 0.1 ppm (sic). It looks like he is so preoccupied with his 10$^{-10}$ that he doesn't see a factor thousand error.) Maybe he accepts the authority of the ENTSOE, that's the "European Network of Transmission System Operators for Electricity". They should know. From this document:

Activation of PRIMARY CONTROL. PRIMARY CONTROL activation is triggered before the FREQUENCY DEVIATION towards the nominal frequency exceeds $\pm$20 mHz.

Maximum Permissible Quasi-Steady-State Frequency Deviation after Reference Incident. A quasi-steady-state FREQUENCY DEVIATION of $\pm$180 mHz away from the nominal frequency is permitted as a maximum value in the UCTE SYNCHRONOUS AREA after occurrence of a reference incident after a period of initially undisturbed operation. When assuming that the effect of self-regulation of the load is absent, the maximum permissible quasi-steady-state deviation would be $\pm$200 mHz.

This site gives you a real-time view of the deviation.

Even if we ignore the 200 mHz incidents there are still the 20 mHz deviations. We're talking about 400 ppm, that's more than an order of magnitude than the error of the uncalibrated crystal. 4000 ppm or two orders of magnitude taking the reference incidents into account. So the conclusion remains the same: the line frequency's short-term accuracy is by no means good enough to calibrate a crystal.
end of edit

The graph shows that a 50Hz mains frequency continuously fluctuates between 49.9Hz and 50.1Hz, that's a 0.2% error, or 2000ppm. An uncalibrated watch crystal is 20ppm accurate. (Horizontal scale is days.)

This device may be of help:

It's a Chip Scale Atomic Clock which outputs a 10MHz square wave with 1.5 $\times$ 10$^{-10}$ accuracy, several orders of magnitude more accurate than TCXO (Temperature Controlled Crystal Oscillator). Tune your oscillator so that you get 10 000 000 pulses from the CSAC over 32 768 cycles of your crystal.

Only 1500 dollar, which sounds like a bargain to me. (Your own fault, you should have mentioned a budget :-))

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Cheaper? OK, this OCXO (Oven Controlled Crystal Oscillator) has 5ppb (0.005ppm) frequency stability and less than 0.1ppm aging per year. About 150 dollar. Available in 16.384MHz, which is a multiple of 32.768kHz (500x). You mentioned this in your question, though there's really no reason for this.

Some GPS receivers have a 1 PPS (Pulse Per Second) output, which should have high accuracy as well. You would have to count cycles of your own 32.768 kHz clock over at least 30 seconds to get at 1 ppm accuracy. Ideally a single second will get you 32 768 counts $\pm$1 count, which is only a 30 ppm resolution.

• I agree with your post, but from what I understand OP can do the calibration much more easily by using an on-board crystal of higher frequency (like the on-board MCU clock) as mentioned in the application note. – eGovind Jan 6 '15 at 8:40

I have had several designs where I've had to calibrate an RTC during a volume production process. My experience has not been good with trying to sync or compare with some type of ultra-accurate reference - not because of the quality of the results, but because of the cost and the effort involved per unit in the calibration process.

What I've found works best is NOT a short window of high accuracy, but a longer window of moderate accuracy, and it can be done for very little cost or development. If you leave a powered RTC circuit in a box for 10 days, all you need is a computer connected to a time server accurate to 1 second to acchieve ~1 ppm, which is much less than the typical 32.768kHz crystal's 1 year aging error (which is your worst problem if you calibrate out the nominal error and temperature compensate). I don't know if you are talking hobby quantities or production quantities, but this solution works very well either way.

All we did was set the clock for a whole batch of boards (programmatically, or you could do it manually if you want) accurate to 1 second or better. Then leave that batch for a some length of time and check how far they've (each) drifted. 1 second on 10 days is about 1 ppm. You will want to measure the actually ppm drifted by the RTC, then scale it using the datasheet info and you're done.

I should also mention that temperature compensation (if your application allows) is important if you are going to experience a wide variety of temperatures. The temperature error can swamp out any accuracy of your calibration for temperatures more than 10 or so degrees C from its calibration environment.

Hope that helps!

• Wow, you can afford to have your boards for 10 days on a test bench?! – Federico Russo May 7 '12 at 5:49
• Not on a bench, but stored in a box. (as I mention in the post.) – Nathan Wiebe May 7 '12 at 13:03
• @NathanWiebe: Whatever. It still means a dead period of ten days in your logistics chain, which defies the purpose of the method: being low cost. – Federico Russo May 7 '12 at 14:02
• You need to google the term pipeline. It's not like everyone just goes home for ten days... In a large production run (2-3 months from files submitted to units shipped), having one of the smallest and cheapest of many PCBs spending a week in a box doesn't hurt much. – Nathan Wiebe May 8 '12 at 1:41
• If you have to do this for 100s, let alone 1000s, of products a year this is more expensive than buying an OCXO for 150 dollar. Even without everybody going home for 10 days :-). A product just sitting there costs money! Not to mention handling cost. The OCXO could be mounted on the test jig, so that doesn't need extra manipulation. – stevenvh May 11 '12 at 13:49

This user used frequency counting methods that take a long time to measure. So disregard his short term phase noise is the noise floor of his counter and signal to noise ratio. The preferred method is to use a TCXO locked Time Interval counter (pref HP or Agilent now) that measures interval of N clock cycles using 100MHz PLL clock locked to OCXO reference clock and then averages then inverts to display Frequency in 1 second or 100 seconds to 10 decimal places. Averaging out noise reduces standard deviation by root N samples.

Here we see average towards 1e6 and the Power line stability is projecting towards 1e-6 or 1 in 10^6 after 5e6 seconds. This can be done in 1e2 seconds with a proper HP Time Interval counter.

StevenH's reference to stability is horrible and the author admits all the short term error is due to measurement error.

Never-the-less barring daily transients for load cycles the phase and frequency the 50/60Hz grid is extremely stable. Only measurement errors from averaging with glitches rather than using precision TI counts and filtering out glitches, would improve the results. Client overloads can also upset the results when their phase is out of sync when selling power to a neighbouring utility.

Utilities need to stay in sync with their clients nation wide and around the world as best as possible to avoid obvious instabilities. There are significant COntrol System stability improvements to prevent over-reaction to EMP, Solar storms and grid lock in the last decade.. My observations were limited to late 70's when signals were even more stable than this plot. A lot has happened with a move towards HVDC grids which avoid the obvious PLL phase locked constraints of power sharing across a continent. But acceptable tolerances to customers are loose compared to the grid sharing nature of gigawatt PLL's in current sharing mode. ( I can get more theory but it is too techy )

The noisy graph shown by Stevenh is commented by author to have excess noise short term due to measurement error, which can be eliminated with an active BPF at 50 (60) Hz. THey go on to say..

"On short term (seconds to hours), several mechanisms are employed that continuously try to keep the frequency as close as possible to 50.0000 Hz, but that do not consider the phase (i.e., clock error). As long as the deviation between the true time and the time indicated by a mains-driven clock is less than 20 seconds, observed at 8 o'clock in the morning, no further measures are taken. When that deviation exceeds 20 seconds, a correction is scheduled: during the next day (from midnight to midnight) frequency regulators in the entire zone will be set to 10 mHz higher or lower than the normal 50.0000 Hz. Ideally, this results in a correction of 17.28 seconds. The above should normally keep the deviation within about 30 seconds. Only if the deviation exceeds 60 seconds are larger corrections than 10 mHz allowed."

10mHz /50Hz = 0.2 PPM which is better stability than can be expect from 32KHz clock, so that proves it can be used easily to calibrate your clock.

more ref. http://www.stabilitypact.org/wt2/040607-ucte.pdf European pact for ensuring frequency stability across the continent. Union for the Co-ordination of Transmission of Electricity: Pre-Feasibility Study

These all support what I said from the very beginning that if they were not phase and frequency stable, would cause massive power glitches and instability on sharing power. This is something Winnipeg MB in central Canada did right from the start in the 70's and was feeding the central time zone US states with its over ten Terawatt (10TW) power sources in hydro power, a major export from Canada.

• This is not a good solution for measuring the stability of a crystal. It's also a few orders of magnitude out from your initial claim of <1e-10. Also, your quote "I can get more theory but it's too techy" ?? - technical issues are exactly what is dealt with on this site. – Oli Glaser Jul 22 '12 at 6:10
• read formal paper proving what I said – Sunnyskyguy EE75 Jul 22 '12 at 6:38
• I'm not trying to dismiss your observations, but whatever was the case in Winnipeg in the 70's, it seems reasonably clear it's not the case now, so mains reference for measuring stability of crystals is simply not a good solution compared to many other more accurate references cheaply available. It's an interesting topic for another question (or maybe discussion on Meta) though. – Oli Glaser Jul 22 '12 at 7:58
• @TonyStewart A 10 mHz tolerance at 50 Hz is 200 ppm, not 0.2 ppm – W5VO Jul 22 '12 at 14:12
• "10mHz /50Hz = 0.2 PPM which is better stability". Not. That's the correction, not the error. "normally keep the deviation within about 30 seconds". In a 86400 seconds day (which is the time over which they want 5184000 60 Hz cycles) this is a 350 ppm error, or 1700 times the 0.2 ppm you claim. And that's the average over 24 hours, short time accuracy may and will be worse. – stevenvh Jul 22 '12 at 15:50