You could get started simulating using a free toolchain. You'd have to do some work to get it running on the actual hardware one way or another if you ever get to that point.
I use Icarus Verilog, a free Verilog simulator. On my Mac, I just install it using MacPorts:
port install iverilog
On a *nix system, you probably have a package manager of some sort as well. On Windows, it can be run in cygwin, but I have no experience with it on Windows.
Icarus Verilog includes the command
vvp which, when run on the output file of the
iverilog command, produces a
.vcd file. This
.vcd file can be loaded in a waveform viewer for visual inspection of the simulation (I use Scansion on my Mac). There's a Stack Overflow question about how to visualize Verilog simulations.
iverilog command does not give its output the
.vvp extension by default, but I prefer that extension. Use the
-o flag to change the
iverilog output file name. Here's how you create the
.vcd for a single Verilog module and its testbench:
iverilog -o module.vvp module.v module_tb.v