Consider the following MIPS instructions:
lw r6, 0(r1) lw r5, 0(r2) add r5, r5, r6
Assume I have full forwarding capabilities. I know that when I produce a value, I only "forward" it to another next instruction right before I consume it. With that being said, am I allowed to forward from write back stage to execute stage? I've only seen write back stage do direct forwarding to decode. Consider the following cycle diagram:
C1 C2 C3 C4 C5 C6 C7 lw F D X M W lw F D X M W add F D D X M WB
Note: The second occurence of the decode stage signifies a "stall."
Now, in that diagram, I only get
r5 after the 2nd lw instruction finishes its MEM stage. So, I have to stall decode. But at that point, the first lw instruction has completed WB stage. So in that case, would I forward from write back to decode or forward to execute?
If I forward from writeback to decode, that seems like convention. However, if I forward from write back to execute, that seems to comply the practice of forwarding right before you consume.