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I am designing a board which will have 5x DRAM DDR3L Micron MT41K512M8DA-107XIT:P (\$V_{DDQ}=1.35V\$). The question is, how to estimate the peak current consumption of the DRAM and then design a power supply?

In their datasheet Micron specifies Burst refresh current \$I_{DD5B}=160mA\$.

enter image description here

However, this is just an avarage current measured over time as the DRAM Refresh command is executed repeatedly. I need the peak current to design my PSU. I checked Micron document TN-41-01 "Calculating Memory System Power for DDR3". It discusses just average power consumption, not peaks. It shows some example graphs with averages and peaks; for an example see below - the blue line is average given in datasheet, the green is the real current profile, but no actual values are given. It seems peak currents are manufacturer's secrets...

enter image description here

Who has an experience with power supplies for DDR3L? What other pitfalls are there? I already know about VTT and VREF requirements; for that we could use TPS51206 if needed. But for the \$V_{DDQ}\$ supply I hesitate between TPS51916 (a complete DDR supply), and a general TPS54620 that we plan to use for other supplies.

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If you take another look at your image of the peaks, and specifically at the time scales listed there, you will see that the peak profiles happen in the range of something like 2.5 to 15ns.

Which makes sense, as DDR3 works at extreme speeds, at least when compared to power frequencies.

You are not going to be designing any supply system that will actively regulate in the domain of nano seconds. Nor will you get the peak currents all the way from your supply into the chips across a PCB trace.

Which is why you have decoupling capacitors that get picked for working with the frequencies those peaks have, at currents about twice the average. Because, no it doesn't give numbers, but I presume you can also see that the highest peak is about twice the average.

You then design your supply to be compatible with the average current as you would design any other power supply for which you know power consumption.

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  • \$\begingroup\$ Thanks, that makes sense. I was looking into my collegue's design where he has 5x DDR3 MT41J512M8RA, which has I_DD7=282mA. Therefore max avg current draw is 5*282mA=1.5A. But in schematic he has a note that the PSU for DRAM could supply up to 12A! So I was wondering how did he determine he needs 12A supply for the DRAM... But he also has 1188uF of caps close to the supply. Now I think the PSU design is just not optimized yet, and the peaks are supplied from the caps. \$\endgroup\$ – Jaroslav May 26 '17 at 6:51

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