The input of a digital CMOS gate is connected to the gates of (at least) a complementary pair of MOSFETs. If that input is floating the gates may have a potential which turns both transistors (partially) on, which must be avoided (see 1st subcircuit below).
This is not the case in an input/output of an analog CMOS switch (transmission gate). Here the I/Os are connected to the drains/sources of a complementary MOSFET pair and there is no danger of some harmful intermediary state (see 2ndt subcircuit below). Floating is no problem as long as min./max. voltage is not violated.
Of course the input controlling the CMOS switch has to be treated like any other digital CMOS input, i.e. don't let it float.
simulate this circuit – Schematic created using CircuitLab
(Note: in the 2nd subcircuits the substrate connections of the MOSFETs are not shown correctly as the schematic editor offers only MOSFETs with substrate connected to source; actually they are connected to V+ (P-MOSFET) and GND (N-MOSFET))