The datasheet of a FRAM chip (FM1608-120-P) says that "the device has a maximum /CE low time specification that must be satisfied". The datasheet does not state what the consequences are when this limit is exceeded. Chip enable must be pulled low in order for the address to be latched in.
The maximum active time for the chip enable pin as stated in the datasheet is 10,000ns.
What happens when this limit is exceeded? Does it damage the chip? Or does it simply mean that the output will become invalid?