0
\$\begingroup\$

Is there a standard model for estimating the additional clocking latency which needs to be applied based on product interconnects?

For example: Lets say a DDR memory has a switching time of 1 ns.

However, if I want to put that product on a board, the signal path goes from a microcontroller pin through to a PCB board, across a trace, through some connector, through another trace, to a package pin, and along a wire bond before it hits the actual die of the memory.

Each of those parts in the signal path have propagation delays, parasitic capacitances, and inductances that might form which degrades the signal and lengthens the time before a signal can reach its max, so I would need to add more clock time the longer that path is.

Is there a standard for how such setups are evaluated, to estimate what those capacitances/impedances are? I'm aware that traces on PCB have their propagation time determined by the length of the trace and the permittivity of the substrate, but I'm not sure how other considerations factor in.

\$\endgroup\$
0
\$\begingroup\$

The general rule of thumb is that if the trace length is <= 1/10 wavelength of the switching frequency, they can be treated as lumped components. Greater than that, they should be treated as transmission lines with characteristic impedances, reflection coefficients, attenuation, phase delay, etc.

\$\endgroup\$
  • \$\begingroup\$ So are there established rules for how the characteristics of that transmission line are determined in a model? I understand the general idea of figuring out out the impedances and reflections, the concepts I'm less familiar with are parasitics at higher frequencies. \$\endgroup\$ – Zephyr May 30 '17 at 13:11
  • \$\begingroup\$ Yes there are but it is much more than can be covered here. To control the parasitics, you are generally trying to incorporate them in your transmission lines. You will find plenty of web coverage of the topic. I probably have a book or two in my library I could recommend but I am traveling internationally at the moment. \$\endgroup\$ – Glenn W9IQ May 30 '17 at 14:47

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.