Does SGMII use MDIO?

Question

I was reading the SGMII specification and the documentation of a Gigabit MII to SGMII converter (see MAX24287). I do not see a MDIO to control the registers of the PHY (Basic Mode Status Register, Basic Mode Control Register, ...) in the SGMII specification. Thus, I suppose SGMII is using the tx_config_reg to configure EVERY REGISTER (in the document, they only speak about the auto negociation process and how to exchange link patner abilities, not every registers).

In the MAX24287, there is also a figure that shows a MDIO link between the MAC, MAX24287 and PHY. So I am a bit confused : Does SGMII allows to configure EVERY REGISTERS? Or only for the auto negociation?

Thank you

Answer 1

If your connecting the MAX24287 to a processor, then you need to connect the MDIO to both the MAX24287 and the phy as shown below and configure the registers on both

If your using a switch chip, it configures the AN_ADV register to match the MAC mode. The auto negotiation will be handled by the link partners:

In 1000BASE-X auto-negotiation, two link partners send their specific capabilities to each other. Each link partner compares the capabilities that it advertises in its AN_ADV register against its link partner's advertised abilities, which are stored in the AN_RX register when received. Each link partner uses the same arbitration algorithm specified in IEEE 802.3 clause 37.2 to determine how it should configure its hardware, and, therefore, the two link partners' configurations should match. However, if there is no overlap of capabilities between the link partners, the RF bits (Remote Fault, see Table 6-14) are set to 11, and the auto-negotiation process is started again. An external processor configures the advertised abilities, reads the link partner’s abilities, performs the arbitration algorithm, and sets the RF bits as needed.