I was reading the SGMII specification and the documentation of a Gigabit MII to SGMII converter (see MAX24287). I do not see a MDIO to control the registers of the PHY (Basic Mode Status Register, Basic Mode Control Register, ...) in the SGMII specification. Thus, I suppose SGMII is using the tx_config_reg to configure EVERY REGISTER (in the document, they only speak about the auto negociation process and how to exchange link patner abilities, not every registers).
In the MAX24287, there is also a figure that shows a MDIO link between the MAC, MAX24287 and PHY. So I am a bit confused : Does SGMII allows to configure EVERY REGISTERS? Or only for the auto negociation?