Looking at this circuit, I'm wondering if the capacitor polarization "+" is correctly draw. Assuming T2 is in cut, T1 is on, left capacitor will have a 0.7v in its right side (connected to T1 emitter) and Vcc(without load) in its left side (connect to T2 collector).
Looking for this circuit in internet, all kind of draws appears.
Please, could someone help me to analyze the issue?
In fact, I'm wondering if polar capacitor can be used in this kind of circuits.
Good question.
First off, the polarity of the capacitors in your picture is the wrong way around. The + terminal should not be connected to the base of the transistors.
Why the circuit works (when the capacitor polarity is fixed in the drawing):
The base of the transistor will always be around 0.6 to 0.7V above ground (because the base-emitter junction behaves like a ordinary diode). This is where you connect the negative capacitor terminal.
Now two things can happen: The other transistor is turned off. In this case the capacitors positive terminal is connected to the supply voltage via the 22k resistor. All fine in this case.
The other case: The transistor is turned on. In this case the capacitor sees the collector-emitter saturation voltage, typically around 0.1 to 0.3V. The capacitor is reversed biased by about 0.5V!
Why does the circuit works nonetheless and does destroy the capacitors: Ordinary aluminium capacitors can withstand a reverse voltage of about 1V to 1.5V without taking damage. Since the maximum reverse voltage is well below 1V everything is fine.
If you breadboard this circuit and plan to use tantalum capacitors better check the data-sheet for the maximum allowed reverse voltage. Tantalum capacitors are much less forgiving than good old aluminium electrolyte caps.
