I was just wondering why do 4T-SRAM cell designs always have extremely high resistance (~GΩ). Is it because of the constant static power consumption?
The higher the resistance the lower the static power in pullup/pulldown resistors. There's a practical upper limit, because Johnson-Nyquist thermal noise increases with resistance, so you can't just use a ridiculously high, say petaohm, resistor (which would be essentially the same as leaving it floating), but in general you want the highest-valued pullup/pulldown resistors possible. The exception is when dealing with MOSFETs, as the pullup/pulldown resistor is responsible for charging/discharging the gate capacitor, leading to significant speed reduction with high resistance. This isn't as big a problem with BJTs, though there is still somewhat of an effect.
FETs for high-speed applications, incidentally, are often push-pull driven to eliminate this exact problem. In this configuration, no pullup or pulldown resistors are used, and transistors are used to drive the line both high and low. This gives a dynamic impedance to both Vdd and Vss, so you can get all the benefits of a high pullup/pulldown resistor with none of the drawbacks.