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I just got a Saleae logic analyzer and I'm using it to hack a Guitar Hero drum set. The main board within the drum set talks to another sub-board using SPI. When I tap into the conversation, I see this:

enter image description here

Black is MOSI, Brown is MISO, Red is CLOCK, and Orange is ENABLE/slave select.

I notice two strange things going on here:

  1. The clock doesn't always "run". It certainly has a pattern to it: It runs when ENABLE is low (every 100 Hz).
  2. Even when ENABLE is high (which I assume to mean the slave is not selected), conversation between the master and slave occurs.

Does anyone have a guess as to what is going on here? Did the board designers get lazy, or did I do something wrong when capturing the data?

Details:

  • Captured at 4 MHz
  • The clock runs at 2 MHz, when it is actually running

Here is another view, zoomed in:

enter image description here

Obviously, neither of these pictures provide much information as to what is actually being "said", since I didn't zoom in far enough. But I think that they are enough to get my point across. If you want a different image, just ask.

EDIT

Kris suggested that the enable line is used to poll the slave board into sampling. This makes sense. Check out this screenshot:

The small black bubbles with red outlines are instances where the software was able to decode a SPI transmission. These only occur when the enable line is low, which follows what Kris suggested.

enter image description here

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    \$\begingroup\$ Enable lines are not always used as a CS line in the traditional sense. In the case of some ADC devices the "enable" line is to tell the device to perform a conversion, then after the conversion is done the host just clocks in data from the slave. Im sure this has been done plenty of times before. I would look around the internet and see what other people have to say about the protocol used here. \$\endgroup\$ – Kris Bahnsen May 1 '12 at 0:50
  • \$\begingroup\$ This is the only thing I could find on it: members.home.nl/mathijs. \$\endgroup\$ – Chris Laplante May 1 '12 at 0:53
  • \$\begingroup\$ I've added another screenshot. Like you suggested, it looks like actual data is only transmitted when the enable line is low. The other times I'd guess it's just garbage data? \$\endgroup\$ – Chris Laplante May 1 '12 at 0:58
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    \$\begingroup\$ Have you considered a possibility that there're other slaves on that bus? They'd use different slave select lines but the same MISO, MOSI and CLK, so you'd see, well, pretty much exactly what you're seeing. Your waveforms look like several slaves being queried one after another, periodically. \$\endgroup\$ – Thorn May 1 '12 at 2:25
  • \$\begingroup\$ @Thorn, you should put that as an answer. Personally I think you're right. \$\endgroup\$ – Jon L May 1 '12 at 4:39
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I believe the bus you're looking at simply has multiple slaves. They share MISO, MOSI and CLK but have dedicated slave select lines for each of them. The ENABLE signal in your waveforms is one of those slave selects. You can look for other slave selects on the master chip pins if you want to test this hypothesis.

Note how signals seem to change polarity from one slave to another (most noticeable in the clock). Maybe different slaves use different SPI modes.

The waveforms appear to repeat with a certain period which would indicate that the master queries slaves one after another in a loop.

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  • \$\begingroup\$ I do not believe that this is the case. If you take a look at the link I posted (members.home.nl/mathijs), there is a picture of the board a little bit down. There is only one ribbon cable connecting the two boards, with 6 wires (VCC, GND, and 4 lines for SPI). I'm pretty certain there is only one SPI slave. \$\endgroup\$ – Chris Laplante May 2 '12 at 15:37
  • \$\begingroup\$ @SimpleCoder: what about the main board? It can have slaves too. \$\endgroup\$ – Thorn May 2 '12 at 15:40
  • \$\begingroup\$ You are very right. I had forgotten about the transmitter on the main board (the drumset is wireless). I found at least one more CS which accounts for the rest of the transmissions. Thanks for your help! \$\endgroup\$ – Chris Laplante May 2 '12 at 19:18
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Thorn is quite right. What you are seeing is quite normal.

Firstly, multiple peripherals can be connected to an SPI bus. They all share the MOSI, MISO and CLK lines. But each one gets its own CS line. (Just for simplicity, here I have not shown the MISO line)

SPI Connections

If the MCU wants to send a byte to ADC1, then first it lowers CS1. Then it sends 8 clock pulses on the CLK line while writing the data bits to the MOSI line. While this is happening, CS2 and CS3 remain high.

To send one byte to each ADC, one might see a waveform like the following:

SPI Waveforms

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  • \$\begingroup\$ See my comment on Thorn's answer. \$\endgroup\$ – Chris Laplante May 2 '12 at 15:37
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You said it yourself:

Details:

Captured at 4 MHz The clock runs at 2 MHz, when it is actually running

There is also something called the Nyquist Frequency, or the Nyquist Limit. Basically it says that the highest frequency that you can see is less than half of the sample rate. So if your sample rate is 4 MHz, then you can only see frequencies of less than 2 MHz. There is something important here that most people get wrong. You can see frequencies up to, but not including, half the sample rate. So at 4 MHz, you cannot correctly see 2 MHz frequencies.

The side effect of this is also called "aliasing". What this means in practical terms is if you are looking at a signal that is close to, but not exactly 2 MHz, then it will appear as if the signal comes and goes. For a time that clock will be there, then it will go away. This is what I think is happening in your pictures, where the clock is sometimes not there when I think it should be. A similar thing can happen to your data as well.

To get reliable data for debugging this you need to be at least 4x, and sometimes 16x of your max frequency. So for a 2 MHz clock you should be capturing data at 8 to 32 MHz.

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  • \$\begingroup\$ Nyquist applies to analog signals; if one samples a signal of frequency F also at rate S and then outputs it, the result will contain a mix of frequencies kS+F and kS-F, for all integers k; if the input contained nothing outside the range 0..S/2, and one removes from the output everything outside the range 0..S/2, the resulting wave will match the input. "Digital" (bi-level) waveforms have huge quantities of harmonics which will in most practical applications be well above the Nyquist limit, so Nyquist isn't really applicable to bi-level signals. Instead... \$\endgroup\$ – supercat May 1 '12 at 16:50
  • \$\begingroup\$ ...what matters is timing skew introduced by sampling. If one samples at 4MHz, that means there will be 250ns uncertainty as to when any signal change occurs. If two edges occur within 250ns of each other, it may not be possible to ascertain which came first, or whether there was any time between them. A 100ns pulse on a single pin may appear as a 250ns pulse or as a 0ns pulse (i.e. no pulse). \$\endgroup\$ – supercat May 1 '12 at 16:54
  • \$\begingroup\$ @supercat It applies to this as well. Let's say that you have a 2.00001 MHz, 50% duty cycle clock and you are sampling it at 4 MHz. There are two things we can say about this: 1. The clock period will be a little shorter than the sampling interval. 2. The phase between the clock and the sampling will slowly wander. When the phase is lined up correctly, the clock will be sampled as always low for several samples in a row. Later it will be sampled as always high for several samples in a row. Over a long-ish time the clock will appear to go away then come back. That's aliasing. \$\endgroup\$ – user3624 May 1 '12 at 17:28
  • \$\begingroup\$ When sampling analog signals asynchronously, if the input signal fits entirely in the range 0..S/2 (not including the endpoints), it will be possible to reconstruct it precisely. Nyquist says that sampling at anything more than twice the highest frequency component will suffice. When sampling bi-level signals asynchronously, sampling at much higher rates may be required. The reason is that analog filtering and sampling of a bi-level signal will convert pulse widths to amplitudes which can then be captured precisely. Bi-level sampling simply adds uncertainty to pulse widths. \$\endgroup\$ – supercat May 1 '12 at 19:28
  • \$\begingroup\$ @supercat You can view it that way if you want, but the net effect is the same: If your "uncertainty to pulse widths" is larger than your actual pulse width then you have major problems with the waveform you're looking at. \$\endgroup\$ – user3624 May 1 '12 at 20:02

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