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Investigated FPGA boards but cannot find open-sourced board and vendor-neutral FPGA development tools:

  • The ORSoC manufacturer boasts open-sourcing on its website but I cannot really find strong evidence except webmastering OpenCores.org.
  • The duo: Xilinx advertises its products with "Open Source Hardware Innovation Contest for Mainland China Universities". Still their products are proprietary, poor support for *ix --. Similarly, Altera has a poor support for *ix, just check their OS support with Quartus or how to have your logic analyser in the synthetic step?
  • Group of small players -- let you point the best.

Is there some manufacturer strong with open-sourcing things such as hw and dev tools?

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  • \$\begingroup\$ Related question in SO here. \$\endgroup\$
    – hhh
    Jan 12, 2012 at 20:03
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    \$\begingroup\$ There is now an open source toolchain for the Lattice Semiconductor iCE40 FPGAs, see: github.com/cseed/arachne-pnr \$\endgroup\$ Jul 22, 2015 at 0:49

5 Answers 5

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Sadly, there isn't much free software for programmable hardware. There are a few synthesis tools, such as Lava (which expects largely manual placing), Confluence, HDCaml and Atom, and Icarus Verilog, but next to no fitter, mapper or place and route tools (I would absolutely love to be proven wrong in this). Opencircuitdesign.com has collected some tools, but it probably requires some documentation and a bitstream generator. Simulation, on the other hand, is fairly well covered.

On the non-free side, Xilinx' non-free but gratis tools have seen some improvement recently, by adding libusb support and dropping Wind/U (a horrible non-free winelib analog) in favor of Qt (but they won't be updating for retired chips). Most other tools seem sabotaged using a package called flexlm, to such a degree that it's hard to get them running even with the aid of the vendor. I have also been able to run Lattice Diamond software under Linux, but that lacked simulation. For Atmel AT40KAL, the place and route tool could be run in Wine, but the library demands non-standard components (it uses LPM, but refuses 2-input gates), so a sort of mapper would be needed.

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Unfortunately the synthesis tools are all closed source as far as I know. The code contained in them is a big part of their business advantage, so I feel it is unlikely you will seem them open sourced.

Xilinx does have free toolchains for Windows and Linux, and if you don't like their IDE you are free to use their commandline tools with your own editor. I've done this before, it works well for small projects (eg CPLD) where you don't want to fool around with big complex software packages.

Altera I believe only offers free tools for Windows, their Linux tools are paid only last time I checked (this may have changed, it's been maybe a year or so since I last looked).

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  • \$\begingroup\$ My understanding is that synthesis - the process of implmenting a design in the technology's building block components - is the last layer where substituting your own is feasable. It's the next layer - place and route, the timing analysis that needs to go with it, and the bitsream generation which follows, where really closely held information is needed. \$\endgroup\$ Aug 1, 2014 at 18:49
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The Butterfly Board looks like a good open source beginners route into FPGAs. They've already ported the AVR8 core so you can run Arduino sketches/AVR object code on the thing, so there's a sane learning curve.

Update: Now renamed to Papilio Boards.

I think that Xilinx WebPack is needed and it's available for Windows and Linux.

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  • \$\begingroup\$ The webpack should be free for you also. \$\endgroup\$
    – Kortuk
    Jun 20, 2010 at 19:32
  • \$\begingroup\$ sorry but cannot really see what is the "open source" with it. Would rather slip coin with over half cheaper like: item.taobao.com/auction/…. \$\endgroup\$
    – hhh
    Jun 25, 2010 at 15:11
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    \$\begingroup\$ Although it relies on the proprietary Xilinx toolchain, the Butterfly One includes 1) an open-source board design, 2) an open-source "programmer" (bitstream->flash utility), and 3) lots of open-source IP as examples. Recommended! \$\endgroup\$
    – Tyler Oderkirk
    Aug 17, 2010 at 14:45
  • \$\begingroup\$ Maybe you should update your link to point to the Butterfly One? Also, do you know how well supported these are(like how many people use them and if they're good for beginners)? \$\endgroup\$
    – Earlz
    Dec 17, 2010 at 5:55
  • \$\begingroup\$ The schematics and all are open source for the Butterfly One and I got this running completely on my Arch Linux computer. You have to manually compile a few things, but I wouldn't say it's harder than most FPGAs to get started with. (and probably easier because it comes programmed as an AVR softcore \$\endgroup\$
    – Earlz
    Dec 22, 2010 at 8:26
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FPGA development tools are all tightly coupled with the FPGA devices themselves and are utterly dependent on proprietary details of the FPGA architecture, particularly at the placement, routing, and bitstream generation levels. As such, vendor-neutrality is largely non-existent. Higher-level tools may be vendor-neutral to some degree (e.g., Synplify, ESL tools, verification tools, etc.), but they're certainly not open source.

On the other hand, there are many academic tools that are open source. As long as you don't want to develop for a real physical device, you can use the VPR 5.0 toolchain.

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  • \$\begingroup\$ I don't buy the "tightly coupled to hardware" explanation. It's the same with different instruction sets for embedded CPUs. \$\endgroup\$
    – maxy
    Mar 3, 2014 at 19:20
  • \$\begingroup\$ @maxy - no, it's really not. A CPU abstracts away intense amounts of hardware detail which is exposed to, and must be considered by, an FPGA toolchain. A C compiler doesn't really need to know or care if the output of the multiplier will get to the next register on time, and even the board designer only has to look at the maximum allowed clock speed to know this. For an FPGA tool, you have to know how long the multiplier takes, what the setup time of the register is, and then calculate the delay between them based on where you put them on the chip and how you route the signal in between. \$\endgroup\$ Aug 1, 2014 at 18:46
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Neither open-source nor still supported but Xilinx offers a free, cross-platform (Java) API called Jbits which allows directly programming (and on-the-fly reprogramming) of FPGAs. I believe only CPLDs and up to Virtex-II are supported, but it's the closest thing to allowing devs to produce their own custom synthesis tools. Planning to play around with this quite a bit in the near future.

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  • \$\begingroup\$ Jbits was really cool. \$\endgroup\$ Dec 3, 2011 at 22:42

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