I have a setup as shown in the schematic below. I am using AD9833 DDS to generate a sine wave with ~300mV DC and ~600mVpp signal. I am sending this though a RC high pass and sending this over as first input to an AD620 in-amp. The other input to the in-amp is ground. I am adding a buffered voltage of 1V to set the output common mode as suggested in the data sheet. The first scope capture shows node A (the input sine wave to the inamp). The output is shown in the second capture and as you can see the chip is railing(or is unstable, I dunno). I can't figure out what is going wrong. The gain should be simply ~1.5, so there should be no reason for this weird output. What I have messed up in the design? I have probed all nodes to make sure the voltages are correct.