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How to find the impedance looking into the drain of basic mosfet current mirror, including the device capacitances?

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Is it like the ro of M2 is parallel to Cgd and Cgs. Do we consider the 1/gm from M1 transistor?? I am also including the small signal model[!

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    \$\begingroup\$ This is described in any decent textbook about analog circuit design. Or look here: d.umn.edu/~htang/ECE5211_doc_files/ECE5211_files/Chapter3.pdf First draw a proper small signal equivalent circuit. Then make an expression for the output impedance. From this it will become clear if the gm of M1 is relevant or not. Think of a MOS diode, what is the small signal impedance of a MOS diode ? Realize that M1 is connected as a diode. \$\endgroup\$ – Bimpelrekkie Jun 14 '17 at 12:35
  • \$\begingroup\$ Thanks for the pdf. Just to confirm one thing, if we are giving any high frequency input to the MOSFET we just need to include the corresponding capacitances parallel to the ro of M2, is it?? \$\endgroup\$ – Swap Jun 14 '17 at 13:19
  • \$\begingroup\$ A better way is to always include the capacitors and only after evaluating the small signal model decide if they're relevant for your frequency or not. A small capacitor combined with a very high gain can still influence low frequency behavior (do you smell that Miller effect ?). So don't disregard anything beforehand. With more experience you'll know when you can safely do that and when not. But when still learning, take all so you can prove when you can disregard a cap and when not. \$\endgroup\$ – Bimpelrekkie Jun 14 '17 at 13:50
  • \$\begingroup\$ Now I have included the small signal model. For Cgd2 we will use the miller effect and we will get a capacitor at the input and output sides. Cgs2 is another capacitor at the output side. But what about Cgs1? Where do we consider its influence, at the input or output? \$\endgroup\$ – Swap Jun 14 '17 at 14:26
  • \$\begingroup\$ You overthink this too much, you need to place the caps in the proper places in the model. Why consider if a component's influence is at the input or the output ? A Cgs is between gate and source so place them there in the model. Then re-evaluate the model. Do that properly and you'll see where the cap has influence. Never assume that it only influences input or output, do the proper maths and see where it ends up. Circuit evaluation is about following the right procedure correctly, only make an assumption when you can prove that that is something you can do. \$\endgroup\$ – Bimpelrekkie Jun 14 '17 at 14:44
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A perfect ccs has infinite impedance.

A real pcs has that by passed by input capacitance and less than infinite gain.

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    \$\begingroup\$ Can you define your abbreviations? \$\endgroup\$ – Scott Seidman Jun 14 '17 at 13:21

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