I have recently designed a four-layer PCB in KiCad. It is a spectrometer having PIC24EP and a CCD linear image sensor (TCD1304). The layer stack up is as follows:
- Signal (no copper pour)
- 3.3 V power plane
- Signal (copper pour connected to ground)
The TOP layer is of RED color and the bottom layer is of GREEN color. The middle layers are completely copper pour (no trace in them). Below is the picture of my layout:
I have read over here about three types of coupling, and I have been trying to reduce as much noise as possible (not even µV, if it is possible to achieve). I have mentioned below how I think my board should be avoiding each type of coupling. However, I am not sure if I understood the concept correctly and maybe I have missed a few things which I don't know yet. That's why I have posted this question. Please review my board and my explanation and help me.
Common Impedance Coupling:
The ground plane behind the TOP signal layer helps in reducing the impedance of the ground (as it has widest area). I have used two pins for
GROUND in header
J1 to reduce the common impedance coupling.
Electrical Field Coupling:
I have taken care of distance between critical tracks. The analog pin of TCD1304 is far away from the clocks of TCD1304 and oscillator.
Magnetic Field Coupling:
I know that magnetic field coupling can be reduced if there is a large distance between loops and they are aligned at 90 degree to each other. There is a wide distance between TCD1304 clock lines and the ADC pin. However, I can't run horizontal/vertical tracks on top/bottom layers as I think it is not possible (please suggest to each that if I am wrong).
Regarding Return current path:
The return current path of the top layer will be ground plane (as it is just below it) and of the bottom layer will be 3.3 V plane. I think the return current path for oscillator and crystal will be ground plane and as you can see it in layout, it is not interrupted. The return current path of TCD clock lines and analog output line will be just below the signal and hence, it is not interrupted as well.
I am not quite sure about voltage references (LM4041). I want to have very low coupling to them for stable references. I think there is no such problem with my references in my board, but I can consider to place them at the bottom layer if it helps to achieve good performance.
I am not sure about position (at what layer) of the decoupling capacitors. Please tell me best placement for them.
The clock frequency of TCD is 2 MHz. The PIC24EP has 12 MHz SMD crystal. The Fosc of the PIC is 64 MHz. I know maybe most of the things won't matter at this frequency, but I am an undergraduate trying to learn and build things. Please point me towards the right direction.
I have modified my layout as suggested by others (just solved the pads issue). I am working on reducing noise by understanding what others has suggested.