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I am working on BASYS3 and using Vivado. I have a 3 MHz signal and I have to make it close to 190 MHz. BASYS3 can increase the frequency by 64 times; however my problem is that BASYS3 takes at least 10 MHz as an DCM input frequency, so 3 is not enough. Is there anything that I can do to solve this problem?

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  • \$\begingroup\$ Change your 3mHz signal source to 10mHz? Use a simple PLL up converter to multiply your 3mHz by a factor of 4 to 12MHz? \$\endgroup\$ – Michael Karas Jun 20 '17 at 13:36
  • \$\begingroup\$ Thank you but PLL takes at least 19mHz as an input however i have 3mHz. So it cannot solve my problem. \$\endgroup\$ – Efe Demirok Jun 20 '17 at 14:20
  • \$\begingroup\$ Can you cascade two PLLs? \$\endgroup\$ – Simon Richter Mar 3 '19 at 1:05
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When you can't meet the requirements of the internal PLLs, you must use external circuitry. At a minimum, you need an external VCO or VCXO, and a filter to drive it. The divider(s) and phase detector can be implemented as logic inside the FPGA.

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