I am a bit confused about return currents on a ground plane. I try explain it based on drawing. Let be a PCB with ground plane that is powered by external power supply through a connector. An LDO regulates appropriate voltage for component on board.

Does the current of this component return to the LDO ground or to the main ground connection? (Which of 2 arrows does the return current follow?)


simulate this circuit – Schematic created using CircuitLab

This confusion stems from uncertainty in my head, how to treat the power connection. If it should be treated like a signal, the the current returns to the LDO. On the other hand an LDO doesn't "produce" current, but simply dissipates excessive external power. It itself returns current to the ground connecter. Thus, it ground pin serves double purpose: return current to the ground connector and receive return currents from the component(s), which seem odd to me. Rather it seems to me that the true surce of current is the main power connector and that's where the current return.

Understanding this problem is important for how I place LDO and components, that it powers, relative to each other.

  • 2
    \$\begingroup\$ The 7805 that you show is not an LDO at any stretch of the imagination. \$\endgroup\$ – Michael Karas Jun 21 '17 at 14:03
  • \$\begingroup\$ it is symbolic. disregard it, it was simply immediately availible symbol of a voltage regulator on CurcuitLab. \$\endgroup\$ – Andrey Pro Jun 21 '17 at 14:46

Primary current flow is from the component to the connector. A secondary (usually smaller) current flows from the ground of the 7805 to the connector. This secondary current is the current drawn by the 7805 in operation, and can be found in the data sheet. (And, as a comment, a 7805 is nobody's idea of an LDO, which stands for Low Drop Out - the minimum voltage difference between the input and output).

At this level of performance, there is no need to worry about the effects of ground currents, although if you ever get to dealing with amps or 10's of amps, or mixing high-speed logic with sensitive analog functions, controlling the return paths of ground currents can become quite important.

  • \$\begingroup\$ Thank you. Exactly what I wanted to know. 7805 doesn't matter, was simply immediately availible symbol of a voltage regulator on CurcuitLab \$\endgroup\$ – Andrey Pro Jun 21 '17 at 14:14

Two errors in output voltage may occur.

  • DC error simply I*R where R is the path resistance from LDO to load.
  • AC transient error where path inductance affects spike noise V=LdI/dt with 100nH/m roughly for thin wire or tracks. Tracks have a know mOhm/cm and nH?cm resistance but often neglected for tracks 2~3mm for 30mm path lengths for 1A loads. Online calculators help in these calculations.
  • if you have fat tracks or a ground plane, or copper pour then one can often ignore these complex calculations.


To fully understand DC noise, one must understand the inductance of the ground/return wire path and slew rate of load, e.g. ESR and switched capacitance of CMOS or inductive L/R kickback etc. This demands decoupling caps to be placed near load, or in small cct. near source.

  • it can only be measured as noise using a probe with no ground wire and only with tip removed using pin and barrel of a calibrated 200MHz probe or AC coupled into 50 Ohm AC coupled coax and scope. ( or pref. R ratio to 50 Ohm terminated coax.

  • All LDO 's also have output resistant, not defined as such but equal to the inverse of "Load regulation Error" e.g. if Vout drops 50mV@1A then for 5V it has a load regulation error of 50mV/5V*100%=1% and an ESR output of 50mV/A=50 mOhm which may be (hypothetically) the resistance of say a poorly designed return track and thus double your load regulation error.

ticky tacky technical details

  • Since an LDO is often designed with Op AMps with limited BW, its transient correction is reduced to nothing for slew rates limited by the driver output. Although MOSFET output LDO's have a much lower ESR (RdsOn) than BJT types the good thing is a much lower dropout voltage Vin-Vout but with decoupling caps on output, it reduces the feedback and can cause no feedback at very high frequency, thus FET based ultra-low LDO's are preferred but have specs for a limited range of e-Cap ESR's for stability reasons. You want low ESR but not ultra-ultra low ESR inside the feedback loop and may require a series L to decouple for improved transient load error.
  • \$\begingroup\$ This is certainly useful, but not what I asked. I would award 3 upvotes if it was possible, but accepted anwser goes to WhatRoughBeast \$\endgroup\$ – Andrey Pro Jun 21 '17 at 14:11
  • \$\begingroup\$ Return goes to the path of least resistance and least inductance. The impact is my answer which is more accurate on why resistance and inductance matters on the return path.. Obviously the logic answer is they are common. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Jun 21 '17 at 17:00

All possible paths will be used in returning, proportional to the conductance of the path. Even around the edge of the PCB ----certainly a valid path ---- you will be able to detect return current flow.

Your task is to tolerate those many paths of current. One approach is the "local battery" approach, where you filter heavily at the load, so heavily the various path-currents are nearly DC.

I've used the "local battery" approach since a kid, when my gain=100,000X audio amplifiers would oscillate UNLESS I paid very careful attention to keeping the output stage ( maybe 10 milliWatts into a speaker thru transformer) from feedback to the input stage, with that feedback occurring in the common battery impedance. Turns out I needed several 5,000uF caps and 100_ohm resistors to filter the power to the input stage, so the output 10mW would not upset the input bipolar common-emitter (power supply rejection ZERO) stage.


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