For the small signal impedance of a forward diode we usually write: $$r_d = \frac{n\cdot V_T}{I_D}$$ However, in datasheets one usually finds a specified forward resistance: \$r_f\$

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Can anyone explain the difference and or relation between the two?

  • \$\begingroup\$ \$V_T\$ already includes \$q\$, unless you mean \$Q\$ to be something I'm not aware of here. Can you point me to the reference where you got that equation? \$\endgroup\$ – jonk Jun 21 '17 at 17:44
  • \$\begingroup\$ My bad, you are right. I copied the formula from another question, but forgot to check it. It should be correct now! \$\endgroup\$ – Douwe66 Jun 21 '17 at 17:50
  • \$\begingroup\$ Looks like it is still there. Need me to fix it for you? \$\endgroup\$ – jonk Jun 21 '17 at 18:00
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    \$\begingroup\$ Did you lose the \$n\$? \$\endgroup\$ – jonk Jun 21 '17 at 18:14
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    \$\begingroup\$ One more question. Are you looking to develop a mathematical model of understanding, which both qualitatively explains and quantitatively predicts that curve you see? Or are you just looking for some hand-waving about the left and right behaviors? \$\endgroup\$ – jonk Jun 21 '17 at 18:39

You have an equation for the DC dynamic resistance- the Shockley equation, minus the ideality factor (Edit: it has now been added in). And it's valid- at a few hundred Hz, certainly.

However to, quote from this app note, "The DC dynamic resistance point is not, however, valid in PIN diodes at frequencies above which the period is shorter than the transit time of the I (intrinsic) region. The frequency at which this occurs, fT , is called transit time frequency".

Above fT, the resistance is still inversely proportional to applied current, but is significantly lower. The proportionality factor depends on the physical parameters (Intrinsic region width and electron and hole mobilities and carrier lifetime).

\$R_S = \frac{ W^2}{(\mu_n + \mu_p) \tau I_F}\$

Where W is the intrinsic region width, \$\mu_n\$ and \$\mu_p\$ are electron and hole mobilities and \$\tau\$ is the carrier recombination time.

We can predict fT as follows:

\$f_T = \frac{1300}{W^2}\$ with W in microns and fT in MHz, so in the case of the Infineon diodes W = 4.5\$\mu m\$ so fT = 64MHz.

  • \$\begingroup\$ That is interesting! Does it mean that for frequencies \$\ll f_T\$ the Shcokley equation holds and \$\gg f_T\$ the \$r_f\$ plot? \$\endgroup\$ – Douwe66 Jun 21 '17 at 18:53
  • \$\begingroup\$ Yes, that is correct. This should allow you to predict the RF resistance at various currents if you want to use the PIN diode as an attenuator rather than just a switch. \$\endgroup\$ – Spehro Pefhany Jun 21 '17 at 18:56
  • \$\begingroup\$ Thank you! I think that gave the right insight, as I want to use it for a diode bridge switch, where it should also be applicable... \$\endgroup\$ – Douwe66 Jun 21 '17 at 19:02

Signal impedance is not the ideal case as in Shockley's equation due to junction bulk resistance and conductor losses and temperature coefficients of the semiconductor.

Therefore you always use the Mfg's specs at defined junction temp.

A model can be obtained from OEM or use a 1 or 2 resistor Vf diode model can be used that includes the nonideal bulk and conductor resistance.

My insight

Z(f) near 0V and in reverse bias is freq. dependant from capacitance creates a complex impedance. It is graphed by Infineon as Rf and Rp where the Rp @ 1GHz @0V is almost the same reactance as Rd when forward biased at low frequency @ 2mA.(15 Ohms)

I see that this part has a graph on p.4 with 0.95V @ 100mA @85'C yet the package is is rated for 250 mW from 55'C to 118'C depending on part number.

Therefore unless you have very large copper area (see their tech specs) and keep cool, I suspect you might want to limit the dissipation to 100 mW.

My Rule of thumb ( aka Stewart's Law) is that ESR or Rf of the Diode is always inversely related to the Pd and temp rise of the package design.

or ESR=k/Pd for k=1 ±50% @ 85'C (for most chip designs and applications) not all.

  • let's test it here.
  • Datasheet = 250mW absolute max at various temps thus ESR=1/0.25 W= 4 Ω

If we look at the Rf curve you supplied , at Ta = 25°C, Rf= 2 Ω typ ~ 1mA but not shown @ 85'C. Thus this design has excellent Rf characteristic but a rather poor thermal Rth resistance so limited in power. ( The size of the chip and internal Rf/Rth ratio is what affects k more than my rule of thumb)

Also note all datasheets give results at least at std temp. 25'C yet most designs are constant thermal resistance, unless active cooling. so temp rises with current and voltage drops from Shockley voltage NTC with rising temp.

  • \$\begingroup\$ Thank you. I suspect that Rf is the ESR and Rd is the small signal impedance. If that is correct they should probably be added in calculations for the total small signal resistance... \$\endgroup\$ – Douwe66 Jun 21 '17 at 18:13
  • \$\begingroup\$ No , there is no account for bulk resistance and gold bondwire resistance in Shockley's model. His model is the ideal case. That's why the slopes change and the 2 R 2 CR model works better \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Jun 21 '17 at 18:18

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