So we have this ASM diagram, which I have to convert into register transfer level. enter image description here

I have already done some similar examples and I will usually start with defining next-state logic, than output logic and register data path.

With this example I have trouble with defining next-state logic. If I make table of state transitions, I need to take also start, a and b in consideration. Since we have 4 states we need 4 bits for that + one bit for start, one for b!=0 and one for a > b. That is simply too much combinations to write on paper. I suppose that maybe there is simpler solution for this.

What does the ready A state do? I'm confused from the diagram.

  • 2
    \$\begingroup\$ This is not a state chart, so a notion of "next state" is meaningless here. \$\endgroup\$ – Eugene Sh. Jun 23 '17 at 21:43
  • \$\begingroup\$ I am sure next state can be derived from this diagram, besides that is the question how to do so. \$\endgroup\$ – Zvnoky Brown Jun 23 '17 at 21:46

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