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I am trying to draw a layout for inverter and i am not sure about how many contacts to be placed in the diffussion region of NMOS and PMOS and what is the reason behind selecting that particular number of contact?

I am using Cadence Virtuoso tool for layout editing

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It is usually a matter of how many contacts you can fit without violating DRC rules.

For a small inverter using minimum size transistors one or two contacts per drain/source/gate is often enough. But manufacturing reliability might improve when 2 contacts are used. That might increase the size of the cell though so in many logic gate libraries only one contact is used.

There are many compromises to consider when layouting circuits including logic circuits. The "ideal" layout does not exist. Likewise there is no "ideal" number of contacts to be placed. It is always a compromise. Only experienced layouters know what makes a good compromise.

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Picking the # of contacts depends on your current density (in larger processes, 0.5mA per contact was the rule) and how closely matched you need the FETS to perform.

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  • \$\begingroup\$ NMOS to PMOS matching is mainly determined by the size of the devices (W and L). The number of contacts is at least an order of magnitude less important as their series resistance is quite small. This is assuming a sane choice for the number of contacts. So not a 100um wide transistor using only 5 contacts. \$\endgroup\$ – Bimpelrekkie Jun 25 '17 at 12:06
  • \$\begingroup\$ Given contacts upset the dopants, precision matching needs identical contacting. \$\endgroup\$ – analogsystemsrf Jun 25 '17 at 14:32
  • \$\begingroup\$ I fail to see how matching the number of contacts on an NMOS and a PMOS will help much when carrier mobility of PMOS is about 3 times less that of an NMOS. And you can forget about precision matching an NMOS and a PMOS. If you want precision matching between one type, for example NMOS only, then obviously you'd use the same number of contacts or just make a copy of the device (and place dummies, cross-quad etc). The question is about NMOS and PMOS contacts, not about matching them. \$\endgroup\$ – Bimpelrekkie Jun 25 '17 at 15:59

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