I am using an ST-LINK/V2 debugger (Firmware version V2.J27.S6, up-to-date) to program my STM32F407G discovery board. So far, I have been using USB to flash the MCU, using the STM32 ST-LINK Utility v4.0.0.0 (driver v4.4.0.0, st-link_cli.exe v3.0.0.0, should all be up-to-date). Now we are getting rid of the discovery board and we need to flash the MCU using the SWD interface. However, I found some behaviour which is inconsistent with the ST-LINK/V2 debugger manual (UM1075).

The connection of pins as per manual is

JTAG (on ST-LINK debugger) - SWD (CN2 on STM32 board)

  • 1 - 1 (MCU VDD)
  • 5 - 2 (GND)
  • 7 - 3 (SWDIO)
  • 9 - 4 (SWDCLK)

However, in this configuration I get the error

Can not connect to target!

The logfile reads

ST-Link/V2 device detected
Target voltage detected: 0.722835
Error getting target IDCODE: if SWD, check SWD connection
Error (4) while initializing ST-Link in SWD mode

This error I found also in this question but no satisfying answer. I think it essentially means that it does not detect the VDD voltage on the STM32 board (although it is powered with 3V).

I managed to solve the issue by directly connecting the pins in the following way:

  • JTAG 1 - P1 VDD
  • JTAG 5 - P1 GND
  • JTAG 7 - P2 PA13
  • JTAG 9 - P2 PA15

And now everything works fine, I can flash the board as I used to with USB.

I found similar questions here and here but none of them helped.

Interestingly, both types of behaviour do not depend on the ST-LINK CN3 jumper positions on the STM32 board. (Why not?)

Why can't I use the SWD connector? Why does the ST-LINK/V2 do not detect the VDD voltage?


Found that R2 is not fitted (see SWD schematic p. 27 of STM32F407G discovery board manual). I had suspected fitting this with a 100R resistor would solve the problem but it made no difference.

  • \$\begingroup\$ Did you connect the nRST pin on the SWD connector as well? IIRC by default ST Link tries to use hardware reset. \$\endgroup\$
    – Tony K
    Jul 3, 2017 at 17:59
  • \$\begingroup\$ Also make sure you remove both jumpers on CN3 so the onboard debugger doesn't interfere with the external one. \$\endgroup\$
    – Tony K
    Jul 3, 2017 at 18:00
  • \$\begingroup\$ Hi Tony K, thanks for your input. Regardless of the state of the NRST pin or the CN3 jumpers I reproduce the behaviour above. I can readily connect (not using the SWD port but the other way), even if the NRST pin is not connected (regardless of whether I use 'Connect under Reset' in software or not) and the CN3 jumpers are ON. \$\endgroup\$ Jul 4, 2017 at 10:24
  • \$\begingroup\$ I have had general success with the four connections you are using on various st and non-st cortex-m chips, reset is not required...I use openocd to talk to the stlink debugger (discovery/nucleo board). \$\endgroup\$
    – old_timer
    Jul 4, 2017 at 16:26
  • \$\begingroup\$ STM32's don't require electrical assertion of NRST unless you have a bad firmware or one that disables the SWD pins, then it is useful to connect with reset asserted, though for ST's software you can assert reset manually. \$\endgroup\$ Jul 4, 2017 at 21:43

2 Answers 2


The SWD connector on a Discovery board (CN2) is not for programming the on-board Target MCU.

Rather, it is to allow the on-board ST-LINK to be used to program an external target.

If you want to program the on-board target with a different programmer, you will need to study the schematics, find all the relevant signals, and make sure the on-board programmer is not loading the lines - which sounds to be about what you did in picking up the SWD pins from their GPIO breakout positions.

From looking at the schematics, it looks like as if with the CN3 jumpers removed, the Target SWCLK should be available on CN3-2 and its SWDIO on CN3-4. But pins 1 and 3 of that connector are not power and ground - rather, they are the on-board programmer's versions of these signals arriving at the jumper positions.

  • 1
    \$\begingroup\$ Thanks, this is the kind of answer I was looking for! I was confused by the ST-LINK/V2 manual since it suggests I can just connect the appropriate JTAG lines to the SWD pins and then use it as a substitute for the USB connection. \$\endgroup\$ Jul 4, 2017 at 21:37


To use the stm32f4 discovery as an stlink debugger

There is an SWD connector on the stm32f4 discovery board.

pin 1 vref (vcc), pin 2 swdclk, pin3 ground, pin 4 swdio (CN2)

and remove the CN3 jumpers.

To access the target with some other SWD debugger

Remove the CN3 jumpers and pin 2 is swdclk, pin 4 is swdio. You will need a ground and generally a voltage reference (so the debugger you are using knows if this is a 1.8v or 3.3v or 5v or other, basically to power the IO on the debugger) which you can take from the stlink debugger end or the target end, whatever pick a 3.xV and ground.

Or simply do as you are doing and remove the jumpers on the debugger end and access the swd pins directly (PA13/15).

All of this information is readily available in the ST documentation for the board. They dont necessarily use the SWDIO/SWDCLk names everywhere.

  • \$\begingroup\$ No, the SWD connector is connected to the on-board programmer, not the on-board target. \$\endgroup\$ Jul 4, 2017 at 19:45
  • \$\begingroup\$ right the stlink debug end of the board that has CN2 marked as SWD pin 1 is vref, 2 swdclk, 3 gnd 4 swdio, not 2 gnd and 3 swdclk. match those up with the part on your board and it should work fine, used the stm32f4 discovery and other nucleo boards dozens of times with most of the brands chips... \$\endgroup\$
    – old_timer
    Jul 4, 2017 at 21:32
  • \$\begingroup\$ you will still need a common ground and a voltage reference which you can pull from just about anywhere, cn2 or the main connectors to the chip. \$\endgroup\$
    – old_timer
    Jul 4, 2017 at 21:40
  • \$\begingroup\$ No. Again, CN3 pins 1 and 3 are from the on-board programmer. The target is on pins 2 and 4. But yes, you will need to find ground (and if the programmer cares) Vtarget, elsewhere. \$\endgroup\$ Jul 4, 2017 at 21:40
  • \$\begingroup\$ right right forgot about the jumper pins 2 and 4. \$\endgroup\$
    – old_timer
    Jul 4, 2017 at 21:58

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