I have built a simple RL circuit with a MOSFET switch and a flyback diode, as shown, which behaves perfectly in a Spice model, but which exhibits what appears to be a fairly large parasitic inductance in parallel with the main circuit (seemingly in the diode) which causes large voltage oscillations at the MOSFET drain and in the (less than ideal) voltage source (most images are for V3 = 1, with inductance closer to 1.5m and resistance closer to .3 in the test circuit).

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The voltage spikes at the drain look like this. I have included some images of the physical circuit as well. At 1V V3, the spikes can reach 60 or 70V at the drain, and they pull the power supply voltage up and down with them. The power leads from the supply to the circuit are quite large, but from my Spice simulation, I do not think that can be responsible for the observed behavior, which seems to be in the diode. If I model the circuit with a small (20uH) inductor in series with the diode, I get behavior which looks extremely similar (although not exact, but that may just depend on the exact inductance value).

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The MOSFET in question is an IXFB210N30P3 and the diode is a STPS200170TV1 Schottky diode. Because I depend on the exact current values, I cannot afford to add a large snubber across the FET that could "short" some of the current, and anything smaller seems to either have very little effect or to dissipate too much power. I just don't understand where this inductance is coming from, and how I can address it in practice.

  • \$\begingroup\$ The diode is only going to turn on when your drain voltage goes to >=100V. So I don't think the diode is doing anything except adding some capacitance (it is a reverse biased diode after all it will have a capacitance) and hence forming a tank circuit with your inductor. So my hypothesis would be that this added capacitance from the diode is making things more ringy. On the Fig. 6 of the datasheet it shows that the junction capacitance is ~800pF around 100V. Are you seeing oscillations in the ballpark of 1/(2*pi*sqrt(800pF*6mH) ~ 70kHz? \$\endgroup\$ – rusty_old_jfet Jul 3 '17 at 20:16

Why do you say the power leads are not the problem?

It is difficult to see from your photo what goes where. A better picture would help.

Even the power supply may have an inductive output impedance.

You probably need to put a large low ESL and low ESR capacitor local to the FET and diode.

  • \$\begingroup\$ I think you're right about the source of the inductance. The power supply is also extremely large and will inevitably have high inductance anyway, so I don't think I can eliminate the inductance outright. So is there an effective way I can combat those inductive spikes and prevent the FET from blowing, under these high power (100V 100A) conditions? A capacitor or snubber across the FET helps, but it also either "shorts" the FET or adds resistance which makes current regulation harder, and they also tend to dissipate kW of power at full voltage/current. Thanks for your help! \$\endgroup\$ – JAustin Jul 5 '17 at 16:43

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