# How can I generate random numbers in verilog using clock speed?

Suppose I have clock 50 mhz and I want to generate a random number between

1 - 13 (inclusive both)

Suppose when I click a key, then I want a random number between 1 - 13 generated.

My idea:

Click Key

-> (take last 4 digits of clock MOD 13) + 1

I'm not sure how I can access the last four bits of the clock?

• Presumably this is to make a pretty little light come on or some such, and not something that has to be uniformly distributed random? Jul 6, 2017 at 1:10
• Basically I would only like the light to come on when the value is 13 12 or 1 Jul 6, 2017 at 1:12
• why not use all the clock digits? mod 13 will be about the same either way... Jul 6, 2017 at 2:58

One easy way to do this is to write Verilog code that implements a counter that increments from 1 to 13 in repetitive manner. Drive that counter using the 50MHz clock. Enable the counter to count during the interval that the trigger switch is pressed. (That interval will be variable based upon the user). After the switch release the counter will become disabled and will freeze at one of the 1 to 13 counts. Use that as your random number.

The clock doesn't have an array of bits, it is only one bit whose value changes between '0' and '1' 50 million times per second. What you have to do is to create a counter with module 12 that increments its value each time CLOCK_SIGNAL is '1' (or '0'). Your random number should be COUNTER_VALUE + 1

First you have to ask if a pseudo random number would work. They are quite easy to implement.

Short of that, the phase noise from a rc oscillator is random and that's quite easy to implement hardware wise.