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In my circuit I am seeing strange behavior from my piezo. I am driving a 4Khz (TDK PS1240P02BT) piezo buzzer with a BSS138K N-channel logic-level enhancement FET. The PWM output of my microcontroller (PIC18) is connected directly to the gate of the transistor with a 100K Ohm pull-down also attached to the gate. The PS12 piezo has a 1K Ohm resistor in parallel just like the data sheet recommends. The voltage driving the piezo is 12V, and the gate voltage is 3.3V.

Circuit:

enter image description here

Edit: Added potential simulation with Olin's suggested clamping diodes: simulation

The issues I am seeing are dying transistors, piezo volume dropping during longer tones, and the piezo failing to work for a while after playing, and then working again after "resting" for a while.

I have a couple of questions:

  1. Any ideas why the transistors are dying? It doesn't appear to be getting too hot.

  2. Is there a way to determine the impedance of the piezo? It does not appear to be listed in the data sheet. I tried modelling the circuit but this is difficult to do accurately when the capacitance of the piezo is unknown. I did see much higher current spikes than expected when using ~100nF values.

  3. The data sheet lists the piezo at 3.3VP-P, but says it can tolerate up 30V with no DC bias. Is running this through 12V going to destroy the piezo?

  4. Generally, are current limiting resistors and flyback diodes needed for piezo drivers, and if so how does one calculate the value of the resistor?

  5. Finally, as an aside, would the piezo survive in an automotive environment (my current problems occur on the bench with a regulated supply), e.g. would the voltage transients quickly destroy the piezo?

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  • \$\begingroup\$ It would be great that you've put the schematics.. \$\endgroup\$ – abdullah kahraman May 9 '12 at 16:03
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    \$\begingroup\$ Oh come on @abdullah, it's just 4 components which he explained: FET, resistor, piezo, resistor. You don't even have to draw that to picture it. \$\endgroup\$ – stevenvh May 9 '12 at 16:24
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    \$\begingroup\$ The circuit was described reasonably well, but a schematic is still nice to have to show the circuit explicitly without handwaving. \$\endgroup\$ – Olin Lathrop May 9 '12 at 17:21
  • \$\begingroup\$ @stevenvh, yeah, I upvoted the question. But, with the schematics it just would be better, wouldn't it? :) \$\endgroup\$ – abdullah kahraman May 10 '12 at 6:10
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Piezo elements can look quite inductive to the circuit. They can also produce high voltages from external shocks. Some barbecue lighters make a spark electrically by whacking a piezo, for example.

The problem is that either or both of these effects are causing high voltage which is frying your transistor. Make sure there are reverse diodes to ground and power to provide a safe path for any current that would otherwise cause a high voltage. Schottky diodes would be good in this case since they are fast and your voltages are low.

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  • \$\begingroup\$ The BSS138K appears to include a diode, is this not sufficient? \$\endgroup\$ – QuestionMan May 9 '12 at 16:19
  • \$\begingroup\$ @Question: No, the FET body diode could function as the clamp diode to ground, but you still need a clamp diode to 12 V. \$\endgroup\$ – Olin Lathrop May 9 '12 at 17:19
  • \$\begingroup\$ I've added a potential simulation of the circuit to the original question. \$\endgroup\$ – QuestionMan May 9 '12 at 18:28
  • \$\begingroup\$ all xtals have a huge inductive element but in series with a weak motional capacitance, I though \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 May 10 '12 at 6:54
  • \$\begingroup\$ I dont think he was shocking his piezo unit, so the BBQ arc effect is not likely and the model of the piezo values does not fit an inductive arc. Although the motional capacitance create an arc with the large equivalent circuit of the inductance. Although it sounds reasonable, I just dont agree and it doesnt explain the temp. failure /recovery or heating issues. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 May 10 '12 at 8:50
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FETs turn on faster and have lower steady-state on resistance at higher gate drive voltage. When FETs turn on too slowly, or have too high steady-state resistance, or both, they can get hot and fail.

The first thing I would try is: add something between the CPU and the FET to convert the CPU digital output (0V and 3.3V, right?) to a higher voltage -- perhaps 0 to 5V; or 0 to 12 V -- and apply that higher voltage to the gate of the FET. Perhaps something like:

         +12V   +12V +12V
          |      |    |
          R2     R1   piezo
          |      |    |
          +--+   +-R3-+
CPU ----|[Q2 +-|[Q1
          |      |
         GND    GND

where I'd start with R1 as the recommended 1 KOhm, and R2 and R3 perhaps 100 Ohm. (There are other, more efficient piezo driver and FET driver circuits available. Many piezo drivers replace R3 with an inductor.).

The next thing I would check is the power supply. Ultrasonic piezos are notorious for pulling more power than people expect, dragging down the power lines, where the low power supply voltage causes CPU resets and other unexpected problems.

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I have noticed piezo devices with the built-in oscillator driven by DC can be rated as low as 2~9Vdc. You however are driving it at 12Vdc and later 14.4Vdc +/-?

THese are probably driven at resonance in a classic Colpitts oscillator equivalent circuit. You however are NOT driving it at the recommended level which is Input voltage = 3V [Vo-p][Rectangular wave].

Now you know the piezo effect is reciprocal as suggested by Olin's BBQ starter. I don't profess to know the long term effect of DC on a crystal. I know there is a max spec= Maximum input voltage 30V 0-P max. [without DC bias.],which implies the maximum reduces "with DC bias" but is not stated what the maximum dc bias is.

My suggestion is send a detailed report to TDK tech support via your distributor to make sure it gets proper attention.

For best reliability for automotive needs, I would avoid DC bias. Best circuit to generate this is use two CMOS inverters to drive the device with inverted square waves and a 1K resistor in between. Use of Colpitts filter caps can combine the positive feedback resonant condition. With 10MΩ self biasing resistors in feedback for each inverter, you might be able to drive the device with zero dc and 24V p-p or 12V o-p at the self resonant fundamental frequency of 4KHz ( drifting to 5KHz) or if unlucky with buffered inverters get the overtone mode. :(

If you really need a schematic .. make one ( 2 inverters 3 resistors 1M,1M,1K , 2 tiny caps, 1 crystal (aka piezo device).. or ask...

Impedance of the crystal can be obtained with a swept tone generator on a scope with a fixed resistor to measure current vs Voltage in X-Y mode. or use a time base with an envelope method of sweep for max peaks like below.

the power should be milli-watts eg. ~100mW. not enuf to fry Q1

The reason your driver may be getting hot is the capacitive loading causes safe operating area (SOA) to be encroached by a high V*I transient power drop on the transistor which reduces the gain (gFS Forward Transconductance) with temp. , then it stops making sound and then it cools and recovers with a few minute time constant. How convenient alarm? cycling alarm ..ha.

Make sure the signal is a square wave on both inverters of my design. get rid of our Q1 with the ultra high speed voltage switch, you get ultra "high" current spikes. Ic=C dv/dt. You should be able to drive this off 2 CMOS inverters with 5V. Anything more and people may be putting tape over the hole.... :)

TDK piezo 4kHz 12mm dia.

The entire driver schematic should be shown!, but my best advice is already given based on a few assumptions. If you really want to drive people out of the car.. drive it with a bang bang switch with inductor to get a high voltage spike or using step up auto transformer and get 30V o-p without dc bias. Consider 2 'HC04 drivers or equiv. YOu will need additional protection for automotive use.

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  • \$\begingroup\$ Re-reading the fine print from TDK.... "Do not apply DC bias to the piezoelectric buzzer; otherwise insulation resistance may become low and affect the performance." ie short circuit... except suggested design uses DC but probably only 3Vdc, which is safe. Think of it as arcing across 100µm thick ceramic.. so implied but not stated, it is not recommended for DC use more than 3Vdc , because this implies ceramic defect and Japanese company wants to save face and not be too clear. {:P) \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 May 9 '12 at 18:39
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    \$\begingroup\$ And "If you really need a schematic .. make one"? Yeah, right... Why not draw a schematic of how you you suggest this is designed. \$\endgroup\$ – Federico Russo May 10 '12 at 5:31
  • \$\begingroup\$ I admit I put in more experience and comments that you may not appreciate, but the bottom line is , I gave several valid reasons for his issue. One being excess DC, and then I explained why because the material is only 100um thick and punch thru arc can short out. or the SOA thermal issues from lack of low drive impedance ..then I suggested a better solution. If you understand the basics, no further explanation needed, if not, no simple explanation possible. I also explained 2 ways to measure impedance of device and showed plots. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 May 10 '12 at 8:42
  • \$\begingroup\$ @FedericoRusso, that is being a bit overly attacking. Lets keep it professional. Tony, I will admit that this answer could be greatly improved by adding a schematic. Just remember this answer is primarily for those that find this question later through google and only for a short moment focused on the needs of the poster. All users could find that schematic helpful. \$\endgroup\$ – Kortuk May 10 '12 at 9:49
  • \$\begingroup\$ @Kortuk: I appreciate that you try to keep it peaceful :-) and that you left the comment (even though edited). But seriously, suggesting if you need a schematic to draw one is helpful for nobody. (And I didn't even downvote! ;-)) \$\endgroup\$ – Federico Russo May 10 '12 at 10:37

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