# Why does the voltage double in a doubler-circuit?

I’m having a hard time understanding how the final voltage is achieved. I understand that in the first half of the sine wave the first capacitor gets charged to 1V. In the 2nd half the first one is already charged so the 2nd capacitor gets charged to 1V as well. But how does this account to 2V?

Looking at it, it seems like these capacitors are in parallel, so I’d expect them to only provide 1V. Where’s my mistake?

• They are not in parallel, there is a (quasi) current source in between. – PlasmaHH Jul 10 '17 at 10:24
• replace the caps with batteries in your mind and then think about it more – dandavis Jul 10 '17 at 19:32

## 3 Answers The output of the transformer (A) is a waveform that rises up to some peak positive value and down to some peak negative value relative to 0 volts. Let's say it rises to +100 volts and drops to -100 volts (200 volts peak to peak). Typically, the frequency would be 1 kHz to hundreds of kHz and this means that the capacitor closest to the transformer will pass this peak-to-peak voltage virtually without attenuation.

However, passing this AC voltage without loss doesn't mean that it will still be + and - 100 volts at point (B) - the capacitor blocks DC so point (B) could be raised or lowered by some DC amount with the same AC content superimposed.

However, at point (B) the negative excursions are trapped and restricted (by the diode) to being no more negative than -0.7 volts. This means that the voltage at point (B) now only moves between -0.7 volts and +199.3 volts i.e. there is still the same peak-to-peak voltage but virtually the whole range is now positive.

This is the hard bit done because what feeds (C) is a diode peak detector and at (C) is smoothing capacitor thus, you will get a DC peak voltage of about 199.3 volts minus another 0.7 volts making it 198.6 volts. If you take current from (C) there will be a ripple voltage superimposed on the DC output just like any conventional half wave power supply rectifier circuit.

Imagine it in half cycles. During the first positive half cycle the capacitor C1 will pass the voltage and C2 get charged (since D2 is reverse biased).

During negative half cycle, D1 is open and D2 is conducting charging the capacitor C1. And now when the next positive cycle comes, C1 also acts as source adding up to the value supplied by source.

Below is the simulation of your circuit. You can also simulate the same on your end using LTSpcie and probably get a better perspective. Simulation files

But how does this account to 2V?

Charge transfer. The left most capacitor is charged up via the left most diode during the negative cycle. That charge is transferred to the output capacitor during the positive cycle (minus the voltage drop over the diodes).