I am sending the clock signal of a DE0-Nano FPGA to one of its GPIO pins. As I increase the frequency, the signal becomes more and more distorted. Is this an issue with the GPIO pins having small buffers? My scope has a bandwidth of 200MHz and my probes are also rated for 200MHz. What might be the reason for this?
Ultimately I want to modulate data on top of this clock signal.
1) Is there a way I can output a clean clock signal at a high frequency like 100MHz?
2) Can I modulate a clean square wave of data on top of this clock signal?