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I just finished with theory understanding of FET transistor principles, etc.

Right after that I tried to make simple circuit Common-Source with FET and MOSFET the problems occurred one by another.

I could begin with JFET (n-channel) for start:

  • Idss (when Vds = 15V) = 6mA
  • Vgss(off) (when Vds = 15V & Id = 10nA) = from -0.5V to -8V
  • Different admittances at Vgs = 0 and I don't know which to chose for calculating Id

All I wanted was to bias the FET, so that Vds = Vdd/2, so in the middle of the load line (for the start). Vdd would be 20V and Id would be 5mA > Vds would then be 10V, right?

I can't find appropriate Vgs and also don't know how to connect gate resistor (series or parallel) + I can't calculate its value since gate current cant be calculated and/or is not practically usable (neglected).

schematic

simulate this circuit – Schematic created using CircuitLab

Transistor's datasheet: www.mouser.com/ds/2/149/bf244a-292510.pdf

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  • \$\begingroup\$ Vgg will be somewhere between 0 and -8 V to achieve Id = 5 mA. The value needed will vary from device to device. Rgs is not needed as long as Vgg is always negative. Rgs in series with the gate may be desirable to prevent damage in case Vgg goes positive. \$\endgroup\$
    – The Photon
    Commented Jul 11, 2017 at 19:10
  • \$\begingroup\$ How should I then calculate or pick up the right voltage for known Id, Idss and Vds? \$\endgroup\$
    – lucenzo97
    Commented Jul 11, 2017 at 19:33
  • \$\begingroup\$ Also which of these admittances is the admittance when Vgs is zero: Forward transfer admittance, Reverse transfer admittance & Output admittance? If the gm at Vgs = 0 is known and desired drain current also, then the needed Vgs could be calculated, right? \$\endgroup\$
    – lucenzo97
    Commented Jul 11, 2017 at 19:38
  • \$\begingroup\$ None, forward transfer admittance should be \$i_d/v_g\$; reverse transfer admittance I'm not sure about but might be \$i_g/v_d\$. Input admittance in typical operating conditions should be roughly \$j\omega C_{iss}\$. Caveat: I do not regularly use JFETs in the real world, so if somebody contradicts this, believe them ahead of me. \$\endgroup\$
    – The Photon
    Commented Jul 11, 2017 at 20:36
  • \$\begingroup\$ You won't be able to calculate Vgs for a given Id until you've measured a particular device and found its Vgs(off). And even then you might worry about it changing over temperature. If you want a fixed Id, you probably need to set up a feedback circuit to adjust Vgs according to conditions. \$\endgroup\$
    – The Photon
    Commented Jul 11, 2017 at 20:39

1 Answer 1

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If you have a one or a few JFET's in your disposal you can try to measure them.

You can use this setup:

enter image description here

AS you can see you can use a voltmeter to measure Vgs(off) and ammeter to measure Idss at once, all you need is to switch your multimeter between voltmeter/ammeter.

And you know Vgs(off) and Idss you can solve for Vgs:

$$V_{GS} = Vgs(off)* \left(1 - \sqrt{\frac{I_D}{I_{DSS}}} \right)$$

I have two JFET in my workbench First one is BF245A and I measure it and got

Vgs(off) = - 1.9V and Idss = 5mA

And BF245C:

Vgs(off)= -4.8V and Idss = 15mA

(the typical values given in datasheet are -5.6V/17mA).

So, If I want Id = 5mA I would use BF245C.

And Rd = 10V/5mA = 2.2kΩ

$$g_{m0} = \frac{2*I_{DSS}}{|V_{GS}(off)|} = \frac{30mA}{4.8V} = 6.25mS$$

Therefore the maximum gain passible for a given drain resistor is \$R_D = 2.2kΩ\$ is:

\$Av = g_{m0}R_D = 13.75 \; V/V\$ (without Rs)

For automatic bias you now need to select \$R_S\$ resistor

$$V_{GS} = Vgs(off)* \left(1 - \sqrt{\frac{I_D}{I_{DSS}}} \right) = -4.8V*\left(1 - \sqrt{\frac{5mA}{15mA}} \right) = -2V $$

$$R_S = \frac{2V}{5mA} = 400Ω = 390Ω$$

schematic

simulate this circuit – Schematic created using CircuitLab

And now we can test the circuit on the workbench.

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  • \$\begingroup\$ Great! The only thing that disturbs me is that Vgs(off) needs to be actually measured for a designer to have an accurate value. \$\endgroup\$
    – lucenzo97
    Commented Jul 15, 2017 at 17:47
  • \$\begingroup\$ @Keno This is why we almost never use a single stage amplifier. We are forced to use a more advanced circuit with negative feedback. Here you have the example obrazki.elektroda.net/18_1263575503.jpg \$\endgroup\$
    – G36
    Commented Jul 16, 2017 at 7:15

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