I am working on implementing a disciplined oscillator to increase the accuracy and long-term stability. The oscillator would be a VCTXO running at about 25 MHz. My thought is to have a 32-bit counter that would count each clock cycle. A GPS 1PPS would be used as the time reference and counting would begin on a given pulse. After a number of pules (maybe one, maybe 100, maybe some other value), the count would be read out by a micro controller and a feedback signal generated to either slow or speed the frequency of the VCTXO.
As a more concrete example, a 25 MHz oscillator would ideally have exactly 2,500,000,000 pulses in a 100-second period. But the actual count will certainly be either high or low. Based on the actual count, a correction signal would be applied to the VCTXO to speed it up or slow it down. The long term oscillator stability and accuracy would thus be linked to the time reference
My main difficulty is finding a suitable counter.
- I would like something that is 32-bit (gives something like 200 seconds between rollover).
- The counter should be small. I'm developing for a low-power mobile device. A single ic 4 to 7 mm in size would be ideal.
- Ideally, counter readout would be over SPI to support the current micro controller. For size and simplicity, I would prefer not to use a parallel bus to read out the counter value.
- Thoughts on synchronous vs asynchronous counters?
I am open to different technologies that could be used as the counter (separate micro, FPGS, CPLD, Flip-flop array, etc.) Please give suggestions on how to implement.
I did come across the LS7366R-TS (http://www.lsicsi.com/pdfs/Data_Sheets/LS7366R.pdf) which seems like something that might work, but I cannot seem to find it for sale anywhere. I've contacted the company and not yet heard back. But I also wonder if there are alternatives ic's and methods that might be better suited and more readily stocked. Please let me know if I need to further clarify the problem.