I have a microcontroller design that is implemented using a two layer PCB. All the components need to be placed on the bottom layer due to the fact that there is a display in the top layer.
At first thought, I believed that there were no problems at all with the result: The capacitors where near and there were big traces to the processor pin. But as a second thought, I realized that it could be defeating the purpose of the noise suppression capacitors as I was now giving the noise source a low resistance path into the processor's power pin. Therefore, I changed the copper pours to avoid this low resistance path and forcing current to go into the capacitors leads as shown:
In essence, I'm asking anyone that has expertise in this matter to provide some comments and guidance about this design. Is there anything I am missing? I also don't see any problem with the fact that the processor is in the same layer as the VDD signal; if there is any problem, please comment.
It is indeed a mixed signal plane. Pipe's comments makes every sense for me thus I'm renaming VDDD plane to VDD.