i plan on doing a SC test on a power supply that the output is switched on with a p-mosfet i was just wondering if there is defined recovery time for the pmos to cool down before you can do another short circuit test.

  • \$\begingroup\$ It's okay to use the word the when you talk about something we both know about. I don't know what the pmos is. Also, why not just.. eyeball it? Like wait 5 minutes? It doesn't seem like a real problem. \$\endgroup\$ – Harry Svensson Jul 16 '17 at 6:08
  • \$\begingroup\$ Are you talking about the PMOS inside that power supply you're testing or is it your MOSFET? Please clarify your question by editing. In the former case this should be noted in the manual in the ladder case it should depend on the junction temperature ratings. \$\endgroup\$ – try-catch-finally Jul 16 '17 at 9:31

If I understand your question correctly, you want to interrupt a voltage line with a series-connected P-channel transistor and turn it on by connecting its gate to GND. The bias in this case is the voltage \$V_1\$ connected to the source (see below sketch). Then you realize that the P-channel heats up seriously when you do a short circuit test. This is a classic in safety tests in which the quality department rejects the design because risks of fire exists when you short \$V_{out}\$ to ground. The reason is because you end-up in an equilibrium situation in which the bias collapses and ends up forcing the P-channel into a linear mode where it heats up big time. This is solution (a). A better solution is to use an N-channel (lower \$r_{DS(on)}\$ and cheaper than P-channel) as shown in solution (b):

enter image description here

In this application, the source \$V_2\$ is greater than \$V_1\$ by the amount of needed \$V_{GS}\$ to bias the MOSFET (10 V for a classical type). Then, when you short \$V_{out}\$, the MOSFET bias no longer disappears and it sustains the short circuit current with a low \$r_{DS(on)}\$ (low power dissipation). Of course the current is high and you may want to take additional precautions to harness it but the MOSFET is no longer in danger with risks of fire. Finally, if the body diode causes problems, you can connect two back-to-back MOSFETs as commonly done in battery protection circuits for instance (solution c).

  • \$\begingroup\$ is V1 greater than V2 in other words at steady state is V1 our Vout? \$\endgroup\$ – tilengneer Jul 17 '17 at 13:34
  • \$\begingroup\$ Hello, the thing is to have the gate biased at a level higher than the source to turn the N-channel MOSFET on. If \$V_{out}\$ is 12 V for instance when the power MOSFET is turned on, then you must bias its gate with \$V_2\$ higher then \$V_{out}\$ by 10 V (\$V_2=22\;V\$) at least for a classical MOSFET or 4.5 V (\$V_2=16.5\;V\$) or so for a logic-level type (or even less for some low-threshold types). \$\endgroup\$ – Verbal Kint Jul 17 '17 at 15:14

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