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I'm using the P-channel half of an IRF7343PbF as a high-side switch to actuate the coil of a Gigavac P115 relay. I would like to be able to turn off the relay as quickly as possible after detecting an overcurrent fault downstream, in order to break the high-power circuit before the fuses blow.

schematic

simulate this circuit – Schematic created using CircuitLab

If I use a freewheeling diode across the relay coil as is typical to protect transistors switching inductive loads, the contacts take almost 20 ms to open - too slow. With no diode, at turn-off the transistor avalanches with about -60V across Vds. This lets the relay coil current fall much more quickly and the contacts open only 3 ms after the gate is commanded high. I measured the Id and Vds waveforms and the integral of their product gives an avalanche energy around 1.6 mJ. This is in between the MOSFET's single-pulse avalanche energy rating (114 mJ) and its repetitive avalanche energy rating (0.2 mJ).

So what do they mean by "single-pulse"? Is it really only permitted once in the life of the device, or can you do it as often as you like provided Tj is at room temperature before each pulse? In my application the avalanche would occur a few thousand times over the life of the system, and never more frequently than about once a minute. The junction temperature should stay cool. Am I risking cumulative damage to the FET by repeatedly (if infrequently) forcing it into avalanche?

FWIW I gave it 500 cycles on the bench at 1 Hz and it seems to be fine so far. That doesn't mean I'm not abusing it though.

Of course I can avoid this issue by using a bidirectional TVS across the coil with a clamping voltage around 50V, but I'd still like to know.

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    \$\begingroup\$ 1.6mJ is 70x lower than the 114mJ maximum spec... and you're not going to switch this thing fast, at all. You can stop worrying... \$\endgroup\$
    – bobflux
    Jul 18 '17 at 19:20
  • \$\begingroup\$ @peufeu I agree - in practice, I'm not worried. But suppose I were closer to the max spec - I'm basically trying to better understand what these ratings mean. \$\endgroup\$ Jul 18 '17 at 19:25
  • \$\begingroup\$ Damage is from a cumulative thermal effect which rises with energy but dissipates quickly so it becomes exponential towards the abs.max Energy Avalanche Source safe limit unless continuous. $$E_{AS}=\dfrac{1}{2} L*I_{AS}^2~ \dfrac{V_{DS}}{V_{DS} - V_{DD}} $$ \$\endgroup\$ Jul 18 '17 at 20:18
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For "rugged" or "avalanche rated" FETs, the design is (ideally) such that there are no local hotspots on the die during breakdown, so the single pulse rating is the amount of energy required to heat the die to maximum Tj, (with ambient and test circuit as specified, maybe with some guardband.)

So once the die returns to ambient, the pulse can be repeated without cumulative damage to the die.

However, not all FETs are perfectly "rugged" or even rugged at all. Small manufacturing defects can also contribute to hotspots on the die which could cause eventual failure.

In my opinion if you're anywhere near the single-pulse avalanche energy of the FET, you should protect it with a TVS or some other method designed to handle the energy pulse indefinitely to ensure you don't have reliability problems down the road.

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In complement to John's answer, these explain the failure modes, which are mostly due to temperature cycling, hot carrier injection and good old overheating.

http://www.st.com/content/ccc/resource/technical/document/application_note/05/13/69/ee/aa/87/49/b6/CD00100956.pdf/files/CD00100956.pdf/jcr:content/translations/en.CD00100956.pdf

https://www.infineon.com/dgdl/AN_Repetitive_Avalanche_Rev_1.pdf?fileId=db3a3043430f543101430f7c6aea0000

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