# Need help understanding PNP,NPN dual transistor

Hi, i need help understanding how this NPN,PNP transistor work because it make me really confuse from what i'm understand. The circuit is from laptop motherboard schematics. The transistor is IMD2AT108 . Datasheet is here : http://rohmfs.rohm.com/en/products/databook/datasheet/discrete/transistor/digital/emd2t2r-e.pdf

1. Voltage on pin 1&2 is 19.36V
2. Voltage on pin 3 is 19.46V
3. Pin 5 & 6 is connected to ground.
4. Pin 4 is 3.25V

My question is :

1. Please explain why voltage on pin 1&2 is 19.36V ?
2. Suppose for PNP transistor in the circuit is in situration mode because Vbe is -ve but from measurement the PNP transistor is in cut-off mode. Please explain.

Thanks all for your help. Ryan

• As you say, the PNP transistor is in cut-off mode, in other words, pin 1&2 is floating somewhere above $19.46-V_{be}$. It can be $19.46 V$, it can be $18.86 V$, but with all the pico and femto amps flowing through it settles at $19.36 V$. That's what happens when there's no pull-up or pull-down resistor. Jul 20, 2017 at 13:53
• Look at the schematic OP provides. Each of the 2 transistors has resistor across EB to handle leakage, and a resistor in series from control-logic-input to the base to limit current. Jul 20, 2017 at 13:56
• Looks like pin 5 isn't connected to ground, but to some logic level signal. When that goes high, the transistors will turn ON, putting somewhere over 19V on pin 4.
– user16324
Jul 20, 2017 at 14:00