I have a question on different power supplies in a integrated circuit. I have seen VDDIO supply is more than VDDCore. If the input signal is more than the power signal, won't it affect the device?? Explain the purpose of this variations..??
Large integrated circuits usually have multiple power planes to meet the requirements of different parts of the circuitry on the chip. Splitting core and I/O supplies onto separate rails is quite common. This is done so that the core can be built with smaller transistors that offer the best possible performance characteristics (higher density, smaller parasitics, lower power consumption, faster switching speed, etc.) while the I/O circuitry requires larger transistors and higher voltages to drive signals off-chip and interface with the outside world.
It also enables independent adjustment of the core voltage, enabling power-saving features such as DVFS (dynamic voltage and frequency scaling), which is common in low power devices such as cell phones. Using an adjustable voltage regulator for the core voltage enables lowering both the core voltage and core clock frequency to save significant power when high performance is not required.
Separate power supplies can also be used for noise reasons - sensitive analog circuitry including PLLs, serializers, deserializers, RF interfaces, etc. will usually also get dedicated power pins to reduce noise either into or out of these components.
It is also possible to have multiple different IO voltages connected to different sets of IO pins, enabling a chip to interface with other circuitry that is running with different voltage levels.
I have seen VDDIO supply is more than VDDCore.
This is required, as the smallest transistors (and other structures) in modern chip technology cannot support higher voltages than VDDCore limits. These structures are so tiny that they would break when supplied with VDDIO. But you need these tiny transistors in the core because they are the "fastest" and consume the least amount of chip area.
The higher VDDIO is usually required to be able to connect to some standard busses (say RAM or mass storage). The internal chip structures around the IO-pins are designed for these voltages and are thus quite a bit larger compared to the core.
Core voltage and IO voltage are driven by different design considerations.
Core voltage is driven by achieving the desired performance while avoiding damage to the tiny transistors and consuming as little power as possible. As process nodes get finer the optimal core voltage gets smaller.
Power consumption is still a concern with IO, this is why some high speed IO does use low voltages. However considerations of compatibility and noise immunity are often equally if not more important.
Having multiple voltages on an IC does indeed complicate the design. When going from a lower to a higher voltage region care is needed to ensure the voltage is high enough to correctly switch the transistors. When going from a higher voltage to a lower voltage region care is needed to ensure the input transitors will not be damaged. The implications of startup and shutdown also need to be considered (for this reason some ICs have pretty specific requirements for power supply sequencing).
But ultimately that complexity is the price we pay for progress.