I was trying to solve the below question.

A long wire may be considered as a series of RC element where R is the serial resistance and C is the ground capacitance. In figure 1, there is no intermediate gate after first Driver (between a and b). In figure 2, there are 2 Gates in the circuit with Gate_Delay = RC. If delay between a and b for figure 1 is x and for figure 2 is y, what’s the correct relationship between x and y.

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I think y is less than x because as length of interconnects increases delay increases. But I am not able to comment on figure 2. What is the delay in the ckt of figure 2?

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    \$\begingroup\$ Y will be longer in delay because of the presence of inverters and they introduce a propagation delay. \$\endgroup\$ – Andy aka Jul 21 '17 at 20:00
  • \$\begingroup\$ It's going to depend on how long the wire is and the propagation delay of the inverters. The velocity of propagation (percent of the speed of light) of a cable is equal to 1 / sqrt(dielectric_constant_of_insulation). \$\endgroup\$ – davidmneedham Jul 21 '17 at 20:48

If you assume that the length of the wire in both cases is equal and that in the Y case, the wire is simply broken to insert the additional gates, then the propagation delay of Y is greater than X due to the additional propagation delays of the added gates.

While not stated in the problem, in a practical circuit there would also be distributed inductance along the wire and the circuit would be analyzed using transmission line techniques. This allows analysis of reflections, for example. But this would not change the outcome of this basic problem.


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