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I've got a TL16C550CIFN UART wired up to a MC68000 softcore in an FPGA.

The UART seems to be working correctly in that I can write the registers (I'm toggling OUT1 and OUT2 etc) but the baudout pin is constantly high and the transmitter empty flag never clears. I guess the baud generator isn't working or I'm missing something else. I have tried a few external crystals and they seem to oscillate correctly (I can see the clock via my logic analyser) and I've tried hooking up the clock input to a clock generated from the FPGA. In both cases baudout is constantly high, the transmitter empty flag never clears and nothing seems to get transmitted.

I have tried about 8 different chips.. so unless I have a really bad batch I don't think it's an issue with the UART itself. I thought it could be that the UART disables the baud generator when the carrier detect etc signals aren't right so I wired everything on the board to look like a null modem. Still no joy. :(

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  • \$\begingroup\$ Any reason for not putting the UART in the FPGA as well? \$\endgroup\$ – stevenvh May 15 '12 at 4:44
  • \$\begingroup\$ The softcore that is currently running in the FPGA will be replaced with a real processor at some point. The board that has the UART on it will eventually be connected to the real processor. Also I'm pretty close to filling my FPGA. \$\endgroup\$ – user1104505 May 15 '12 at 4:49
  • \$\begingroup\$ What frequency are you supplying both via the FPGA and using a crystal? \$\endgroup\$ – Jason Morgan May 15 '12 at 10:35
  • \$\begingroup\$ Frequency from the FPGA was ~1.5mhz (It was just a clock I had within the FPGA that wasn't too fast). The external crystal is 3.6864mhz \$\endgroup\$ – user1104505 May 15 '12 at 12:49
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Possible causes:

The MR pin is high (master reset)
Have you put your scope on the MR pin? This should be low for normal operation.

The Baud Rate Generator has an illegal value
Have you verified that the values written to the BRG?

The BAUDOUT pin is being pulled high. Are you sure the BRG pin does not have a short circuit?

The UART certainly does not disable the BRG depending on any of the modem control signals. Either the oscillator is not running (and you state that it is) or the BRG is in reset, or the pin is externally driven high/low.

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  • \$\begingroup\$ I actually have it sort of working now. I think I have a combination of some glitching on the bus causing the divisor not to not get written sometimes and some weird issues on the board.. hooking up the ground on my logic analyser to the ground leg of the decoupling cap near the UART caused the OUT1 pin to reset.. so I taped it with my tweezers and the same thing happens. I can now send data but the clock is slightly out according to my LA and it seems that somewhere the word length gets magically reset to 5bits.. Baud out seems to be producing the right clock now too. \$\endgroup\$ – user1104505 May 15 '12 at 12:54

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