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I’m designing battery powered application in the form of a sensor with an onboard high-precision (20 to 24 bit) sigma-delta ADC that measures a couple of load cells in a Wheatstone bridge. My question deals with how to properly power such a device to both meet the low-noise requirements of the ADC as well as long battery life for the overall product.

I intend to supply the sensor with two series connected single-cell alkaline batteries, for instance 2 x AA batteries providing a nominal voltage of 3V. Looking at the discharge curve of a typical alkaline AA battery I can see that the cell voltage ranges from 0.8V (discharged) to 1.5V (nominal). In other words, I will end up with a supply voltage of 2 x 0.8V = 1.6V when I have used the full capacity.

The ADC that I intend to use has an analog supply requirement of MIN 2.7V to MAX 3.6V. Therefore, to make full use of the battery capacity I will need to use some kind of power management circuitry that can boost my battery voltage (VBAT: 1.6V - 3V) to a stable 3V - 3.3V. To do this I have been looking at the possibility of using a DC/DC step-up regulator. The main problem I see with such a device is the large ripple it produces at the regulated output voltage which might be compromise the accuracy of the ADC.

So the dilemma I’m facing is that I would like to have as long battery life as possible and at the same time avoid compromising the accuracy of the ADC. I don’t have any previous experience in using switching type regulators. What type of power management would you recommend for my specific application? Is there a good practice?

Some details:

  • ADC Type: MAX11206 (20-bit single-channel delta-sigma)
  • Current consumption: ADC consumes 300uA during operation and 0.4uA during sleep. The rest of the board draws 400uA in average.
  • Voltage output: 3.3V used for AVDD, REF and VE for ADC/brige and microcontroller on the board.
  • ADC-Bridge Connection: Ratiometric connection (where bridge excitation voltage is the same as the reference voltage).
  • Sampling rate: Very low (1 sps)

Looking forward to hear your suggestions.

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4 Answers 4

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You didn't mention any current requirements for you device nor the overall voltage ranges for the balance of your circuit. You may wish to update your question with this information in order for the answers to reflect a more comprehensive perspective.

The ADC will have an internal voltage reference that will mitigate basic ripple issues as long as the rail supply is above its minimum VIN. I would be much more concerned about noise from the switcher getting into the analog front end of the ADC, particularily with the ~120 dB dynamic range with which you are working.

While switcher noise issues are not insurmountable, I would favor a design with a cell chemistry/count that eliminates the need for a switcher. Examples would be a rechargeable LiPo cell, 3.6 volt primary lithium cells, or 3 'N' type 1.5 volt alkaline cells. These combined with judicious power management of LPOs, if needed, would provide an electrically quiet device.

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  • \$\begingroup\$ Thank you for the reply. I have put some extra details in the end of my post. What do you mean by "overall voltage ranges for the balance of your circuit"? I would prefer to use standard alkaline batteries as it is important that batteries are easily accessible. \$\endgroup\$
    – abaldur
    Jul 22, 2017 at 12:12
  • \$\begingroup\$ @user1507569 I assume you have other devices such as a uP, displays, etc. that have their own voltage and current requirements. These all must be factored into the solution. \$\endgroup\$
    – Glenn W9IQ
    Jul 22, 2017 at 12:17
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You may switch on and off periodically your step-up converter. Switch on to charge a big buffer capacitor, switch off to measure. Inserting a low noise LDO is recommended.

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  • \$\begingroup\$ It may also be possible to simply time the conversion to occur between switching transients. Of course circuit noise is the problem one can control, but there's also ambient EMI to worry about. Target noise level is 1-10 microvolts, which is hard. \$\endgroup\$
    – plasmo
    Jul 22, 2017 at 17:04
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You will have lots of circuitry. To avoid the magnetic coupling, you need zero-area loops and precise 90 degree orientation and/or shielding. Zero area loops will not happen; below is result with 4cm by 1cm loops.

Lets examine the noise floor of magnetic fields coupling from that switcher to the ADC/input circuitry.

Assume the switcher generates [ 0.1amp in 10nanosecond] transients.

Assume the switcher is 4cm from the ADC/input.

Assume the ADC/input has vulnerable area (trace + sloppy GND thinking) of 4cm by 1cm.

What is the induced voltage?

Use Vinduce = [MU0 * MUr * Area / (2 * pi * Distance) ]* dI/dT

Vinduce = 2e-7Henry/meter * Area/Distance * dI/dT

Vinduce = (2e-7Henry/meter * 4cm * 1cm /4cm) * 1meter/100cm * dI/dT

Vinduce = 2e-7 * 1e-2 * 10^+7 amp/second = 2e-9 * 1e+7 = 0.02 volts

Vinduce = 20,000 microvolts


topology is: long straight wire with the 0.1 amps in 10 nanoseconds

located

4cm from

ADC/input with 4cm by 1cm vulnerable loop area

with no shielding; you need 86dB of shielding


By the way, ADC's with internal reference generation do not spec their high frequency rejection of VDD trash.

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To do this I have been looking at the possibility of using a DC/DC step-up regulator.

in case you forgot, take a look at the gpio pin structre and you will see how similar it is to a half-bridge driver, :)

as such, two other ways to approach this:

1) turn a gpio pin into a boost converter;

2) since the current consumption is quite low, use a charge pump - you can construct one by turning a gpio pin into a square wave generator.

the ripple can be managed via a comparator peripheral or adc peripheral, or by parametricalize the adc reference if it allows.

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