Anti aliasing filter + DC offset

Question

I'm looking into sampling a signal into a micro-controller, the ADC will be sampling at ~38.5 Khz with 8 bit depth. The dynamic range is given by 6.021*N + 1.763 dB, so in this case I'm getting ~49.92 dB which means I need to attenuate the signal about that much at the Nyquist freq. of 19.25 Khz.

After some experimenting with TI's filter lab I got the following implementation of a 4th order LPF:

I was wondering about the input impedance of the circuit so I quickly entered it into Multisim and got the following:

At 20 Hz the input Z is about 750 KOhm which is good enough for me, however as we move towards 1 KHz that figures goes down to about 16 KOhm. At 4 KHz (passband) the input Z is only 4 KOhm.

Questions are:

1. How can I improve on that? Is there anything I could do without adding an additional op-amp buffer stage in front of the filter?
2. Since the ADC is single supply I'll need to bias the signal to VCC/2. How can I do that without killing the filter response? Looks like adding a cap at the output and a voltage divider will have a very dramatic effect on the low freq. response.

A passive filter also possible (but low input Z):

^{simulate this circuit – Schematic created using CircuitLab}

Answer 1

How can I improve on that? Is there anything I could do without adding an additional op-amp buffer stage in front of the filter?

Increasing input impedance can be done by scaling the first filter components (R1,R2,C1,C2). Scale resistors UP while scaling capacitors DOWN maintains the same cut-off frequency. Still, source impedance adds to R1...if your signal source impedance is known, and stable, make R1 smaller.
Example: scale filter by ten: R1=27.4K, R2=37.4K, C1=1nF, C2=1.2nF
If your source resistance is 1K, then make R1= 26.4K.

Since the ADC is single supply I'll need to bias the signal to VCC/2. How can I do that without killing the filter response? Looks like adding a cap at the output and a voltage divider will have a very dramatic effect on the low freq. response.

You can add a 2-resistor voltage divider to generate DC input. Since both op-amps have DC gain of 1, this voltage will appear at the filter output (plus-or-minus the small op-amp offset voltages). The 100k bias resistors shown will lower the source resistance (Rsource) only slightly. Incorporating filter scaling, and subtracting Rsource of 1K, and adding DC offset, your filter now looks like this:

^{simulate this circuit – Schematic created using CircuitLab} Use op-amps that have low bias currents, so that those large-value bias resistors plus series-connected filter resistors won't cause DC offset errors. Also, be aware that filter scaling increases thermal noise voltage. If your filter is used with very small input signals, scaling those input resistors up will impact the noise floor. For an 8-bit A-to-D, this shouldn't be a problem.

Answer 2

Think about what the full spectrum of your input signal is and how much spectrum you would like to keep i.e. not be affected by the anti alias filter.

If, for instance, you are only interested in keeping DC to 5 kHz then the lowest frequency that will alias and fold-down into your otherwise pristine bandwidth of 5 kHz will be 33 kHz (based on a Nyquist frequency of 19 kHz). This frequency and higher need to be eradicated to a small level. But how small are noise and harmonics at or above 33 kHz?

So, your low pass filter starts to cut-in at about 5 kHz and reduces signals by up to 50 dB at 33 kHz. But, if you don't think there is any significant amplitude of anything at 33 kHz then the amplitude reduction (brought about by the anti alias filter) might only need to be (say) 20 dB or 10 dB.

It's all about sensibly thinking about what you need and, designing an anti alias filter that works sufficiently but no more than that. Reading between the lines it seems to me that a second order filter might be sufficient freeing an op-amp to be used as a buffer.

Remember that this is the design of an anti alias filter and, using the principles described above, it doesn't mean that there wont be some aliased signals residing above 5 kHz however, in this example, I have assumed that anything in the digital domain above 5 kHz can be ignored and, if necessary removed with digital filters or post DAC filters. Keeping the desired bandwidth pristine is what an anti alias filter is intended to do.

If you want your anti alias filter to do more than the basic function of keeping a section of bandwidth free from being folded into then you need to provide more information but, ultimately, you need to understand the principles involved and think about what you want a bit harder.

Here's a picture of what I mean: -

The red curve is your input spectrum including harmonics (that you don't care for) and upper frequency noise (that you also don't care for). The blue curve is a folded-down (mirror image) of the input spectrum that can potentially disrupt the pristine area of DC to 5 kHz.

I've drawn a little green arrow at 33 kHz and also one at 5 kHz to show how 33 kHz gets folded down to 5 kHz. So, if the 33 kHz amplitude only needs a further 10 or 20 dB reduction to make the folded down version acceptable at 5 kHz then that is all the anti-alias filter needs to acheive.